User contributions for Rolf

31 August 2025

• 22:1422:14, 31 August 2025 diff hist +281‎ m Flash memory ‎No edit summary
• 22:1222:12, 31 August 2025 diff hist −14‎ m Flash memory ‎No edit summary
• 22:1022:10, 31 August 2025 diff hist +518‎ N Flash memory ‎ Created page with "Flash Memory Flash memory is a type of non-volatile storage that retains data even when the power is turned off. It is widely used in embedded systems for storing firmware, configuration data, and user settings. Flash memory can be electrically erased and reprogrammed in blocks, making it very flexible for iterative updates. In SEGGER’s ecosystem, flash memory is often managed and programmed using tools like J-Link debug probes and Flasher programmers, which support..."
• 22:0722:07, 31 August 2025 diff hist +2‎ m CPU ‎ →‎Essential registers
• 22:0722:07, 31 August 2025 diff hist +10‎ m CPU ‎ →‎Essential registers
• 22:0622:06, 31 August 2025 diff hist +15‎ m CPU ‎ →‎Essential registers
• 22:0122:01, 31 August 2025 diff hist +1,265‎ m Hardcore ‎No edit summary current
• 21:4421:44, 31 August 2025 diff hist −6‎ m Hardcore ‎No edit summary
• 21:4421:44, 31 August 2025 diff hist −30‎ m Hardcore ‎No edit summary
• 21:4321:43, 31 August 2025 diff hist +1,131‎ N Hardcore ‎ Created page with "Hardcore CPU A hardcore CPU (also called hard IP) is a processor that is permanently implemented in silicon. Unlike softcores, which run in programmable logic (typically FPGAs), a hardcore CPU is a fixed part of the chip, designed and verified at the transistor level by the semiconductor manufacturer. ==Overview== Hardcores are also typically delivered to the silicon vendor in synthesizable HDL code (usually Verilog), similar to softcores. The hardcore is then synt..."
• 19:5619:56, 31 August 2025 diff hist +623‎ N SP ‎ Created page with "Category:Knowledge Base The stack pointer is an essential part of almost any CPU design. It points to a location in RAM used to store (push) or retrieve (pop) information from. On most CPUs, the Stack grows downwards, so a push operation decrements the SP, but there are also implementation where the stack grows, so a push increments the SP. When saying "incrementing" or decrementing, it should be noted that the SP usually handles items that are multiples of the proce..." current
• 19:4919:49, 31 August 2025 diff hist +678‎ N Speedy ‎ Created page with "Speedy is the name for SEGGER's softcore used in many of their J-Link and Flasher products. Speedy is an 8-bit core, designed to be lean and as fast as possible, with a rather basic instruction set. It execute one instruction per cycle (with the exception of branch instructions) and is used as interface processor. In most cases, it runs at 200MHz, providing an accurate 5ns timing which is more than efficient for most debug and programming interfaces. On AMD Ultrascale si..." current
• 19:4119:41, 31 August 2025 diff hist +211‎ m Softcore ‎No edit summary current
• 18:3518:35, 31 August 2025 diff hist +28‎ m Softcore ‎No edit summary
• 18:3418:34, 31 August 2025 diff hist +426‎ N Softcore ‎ Created page with "SoftCore A SoftCore (or soft processor core) is a processor design described in a hardware description language (HDL), such as VHDL or Verilog, and implemented on programmable logic (e.g., an FPGA). Unlike a HardCore processor fixed in silicon, a SoftCore is flexible and reconfigurable, allowing customization, extensions, or multiple instances in the same device. Examples include MicroBlaze, Nios II, and RISC-V soft cores."
• 18:3118:31, 31 August 2025 diff hist +4‎ m CPU ‎ →‎Essential registers
• 18:2918:29, 31 August 2025 diff hist +798‎ m CPU ‎No edit summary
• 16:2016:20, 31 August 2025 diff hist +243‎ N flashloader ‎ Created page with "Category:Knowledge Base A Flash loader is a (typically small) programmer which programs the flash of a microcontroller (or SoC). It is loaded into the RAM of the device, and is then given the data to be programmed, usually in small chunks." current
• 16:1516:15, 31 August 2025 diff hist +714‎ m In-system programming ‎ →‎In-system Programming vs. Out-of-system Programming
• 16:1016:10, 31 August 2025 diff hist +922‎ m In-system programming ‎No edit summary
• 16:0116:01, 31 August 2025 diff hist 0‎ m In-system programming ‎No edit summary
• 05:4305:43, 31 August 2025 diff hist 0‎ m In-system programming ‎No edit summary
• 05:4205:42, 31 August 2025 diff hist +2‎ m In-system programming ‎No edit summary
• 05:4105:41, 31 August 2025 diff hist +16‎ m In-system programming ‎No edit summary
• 05:4005:40, 31 August 2025 diff hist +71‎ N ISP ‎ Created page with "Category:Knowledge Base ISP is short for In-system programming." current
• 05:3805:38, 31 August 2025 diff hist +643‎ N SR ‎ Created page with "In the context of an Embedded system, SR usually stands for status register. The status register is a CPU register which consists of a collection of flags and settings. Which flags and which settings depends very much on the CPU. == Flags == Which Flags a CPU depends. However, there are a number of flags which most CPUs have, such as: Z-Flag Zero Flag. Indicates if the result of the previous operation has been 0 C-Flag Carry Flag. Typically used in shift and rotate ope..." current
• 05:3205:32, 31 August 2025 diff hist +199‎ m PC ‎No edit summary current
• 05:2905:29, 31 August 2025 diff hist +11‎ m RETI ‎No edit summary current
• 01:5201:52, 31 August 2025 diff hist +560‎ N RETI ‎ Created page with "Category:Knowledge Base RETI is short for RETurn from Interrupt. It is the name of the instruction that many CPUs use as a last instruction in an Interrupt Service Routine (ISR). RETI does not exist on all CPUs, or it has a different name, but RETI seems most common. What it does is usually restore the Program Counter (PC) and the flag register. It usually does the exact opposite of what happens when entering an ISR. So if the CPU saves 8 registers when enter..."

30 August 2025

• 23:4923:49, 30 August 2025 diff hist +4‎ m ISR ‎No edit summary current
• 23:4923:49, 30 August 2025 diff hist −9‎ m ISR ‎No edit summary
• 23:4423:44, 30 August 2025 diff hist +722‎ m ISR ‎No edit summary
• 23:1323:13, 30 August 2025 diff hist 0‎ m DMA ‎No edit summary current
• 23:1023:10, 30 August 2025 diff hist −87‎ m DMA ‎No edit summary
• 23:0123:01, 30 August 2025 diff hist +42‎ m DMA ‎ →‎Benfits
• 22:5922:59, 30 August 2025 diff hist +41‎ m Timer ‎No edit summary current
• 20:2020:20, 30 August 2025 diff hist +138‎ N PLL ‎ Created page with "A phase-locked loop is a piece of hardware that generates an output signal whose frequency is typically a multiple of the input frequency." current
• 20:1620:16, 30 August 2025 diff hist +416‎ N Timer ‎ Created page with "In computing and in embedded systems, a timer (also known as programmable interval timer (PIT)) is a counter that generates an output signal when it reaches a programmed count. The output signal can trigger an interrupt. Timers can be up or down counting, and in many cases can be programmed to be single shot or multiple shot or simply continue once it has read the programmed count (or 0 in case of a down counter)"
• 20:1420:14, 30 August 2025 diff hist −6‎ m DMA ‎No edit summary
• 20:1020:10, 30 August 2025 diff hist +2,104‎ N DMA ‎ Created page with "Category:Knowledge Base In embedded systems, ore more generally in computer systems, DMA stands for Direct memory access. Direct memory access is the ability of a peripheral, such as an Ethernet or USB controller to read or write data directly to/from memory, without involving the CPU. == Overview == DMA requires a DMA controller, which can be a part of the peripheral. == Benfits == A DMA can usually perform the transfer faster than the CPU,..."
• 19:3619:36, 30 August 2025 diff hist +1,014‎ m Microcontroller ‎No edit summary current
• 19:2319:23, 30 August 2025 diff hist +177‎ m Microcontroller ‎ →‎CPU
• 19:2119:21, 30 August 2025 diff hist +115‎ N MCU ‎ Created page with "MCU is short for Microcontroller Unit, or even shorter Microcontroller. Please click on the link to learn more." current
• 18:4918:49, 30 August 2025 diff hist +1,136‎ m In-system programming ‎No edit summary
• 17:4217:42, 30 August 2025 diff hist +1,702‎ N In-system programming ‎ Created page with "Category:Knowledge Base In-system programming, also known as ISP or in-circuit programming (ICP), is the process of programming a computer chip in system, so when it has already been soldered (connected) to a printed circuit board. Almost all devices with some sort of non-volatile storage can be programmed in-system. This applies to microcontrollers (MCUs), FPGAs (Field programmables gate arrays) as well as typically serial (Q)SPI flashes. Even other types of flashes..."

10 June 2025

• 21:0521:05, 10 June 2025 diff hist +17‎ N app ‎ Rolf moved page app to App: Looks better in upper case... current Tag: New redirect
• 21:0521:05, 10 June 2025 diff hist 0‎ m App ‎ Rolf moved page app to App: Looks better in upper case... current
• 21:0421:04, 10 June 2025 diff hist +1,572‎ N App ‎ Created page with "App is short for Applet or Application. Apps are small programs which can extend the functionality of a device. They are well known from Smart phones and tablets and operating systems such as iOS and Android. In the context of embedded systems, apps are dynamic pieces of software that can be linked to a device’s firmware, either statically or dynamically. Typically, they’re dynamically linked, which means they can be downloaded and then executed by a device at any t..."

2 January 2025

• 22:3022:30, 2 January 2025 diff hist +46‎ m CRC ‎ →‎Generating CRCs in software
• 22:2922:29, 2 January 2025 diff hist +928‎ m CRC ‎ →‎C - Source code