Hardcore

From SEGGER Knowledge Base
Jump to navigation Jump to search

Hardcore CPU

A hardcore CPU (also called hard IP) is a processor that is permanently implemented in silicon. Unlike softcores, which run in programmable logic (typically FPGAs), a hardcore CPU is a fixed part of the chip, designed and verified at the transistor level by the semiconductor manufacturer.

Overview

Hardcores are also typically delivered to the silicon vendor in synthesizable HDL code (usually Verilog), similar to softcores. The hardcore is then synthesized by the silicon vendor and "hard coded" into the silicon

Characteristics

  • Permanent in silicon - The CPU is fabricated as part of the device and cannot be altered after production.
  • Because the design is laid out at the transistor level, hardcore CPUs achieve higher performance, lower power consumption, and smaller silicon area compared to an equivalent softcore.
  • No user customization - Unlike a softcore, a hardcore CPU cannot be reconfigured, extended, or modified by the end user.

Examples

  • ARM Cortex-M0, M3, M4, M7 in microcontrollers and ASICs
  • ARM Cortex-A and Cortex-R cores in SoCs

History

In the past, hardcores were delivered more as a pre-laid-out design rather than purely as synthesizable HDL. This meant that licensees got something closer to a hard macro that was already physically laid out for a certain process. The industry started to shift towards using synthesizable HDL cores more widely in the late 1990s into the early 2000s. By that time, it became a lot more common for IP vendors to deliver cores as HDL code so that chip designers had more flexibility in integrating and optimizing them for their own manufacturing processes. Hard macros were optimized for a specific fabrication process. A pre-laid-out hardcore was tuned to a particular node or a particular foundry’s process. Once the shift to synthesizable HDL happened, it gave designers a lot more flexibility to port the core to different processes. Some cores are actually available in both variants: The popular ARM7TDMI was introduced in 1994, as a hard macro. It was not until 7 years later, ARM introduced the ARM7TDMI-S, which was almost identical to the ARM7TDMI, but delivered as synthesizable RTL (written in Verilog). So it was at that time when the shift from hard macros to synthesizable RTL happened, at ARM but also at other IP vendors.