TI MSPM0G

The TI MSPM0G are Cortex-M0 based micro controllers.

Flash Banks

Flash Bank	Base address	J-Link Support	Loader
			Name	Size
MAIN	0x00000000		Default	up tp 512 KB
NONMAIN	0x41C00000		Default	up tp 1 KB
DATA	0x41D00000		Default	up tp 16 KB
FACTORY	0x41C40000

ECC flash

The flash is ECC protected.

• When programming code with J-Link, the device flash controller is set to automatically program the correct ECC values.
• Manual ECC programming is currently not supported by J-Link.

Erased value and Blank Check

• The erased value of the TI MSPM0x devices is non-deterministic. This means that there is no specific erased value for erased flash.
• A blank check via device internal flash controller is implemented. This result may differ from read back of erased flash area.

NONMAIN

The NONMAIN region is supported by J-Link for programming. However, the NONMAIN holds boot configuration data and therefore must be programmed with extreme care:

• Changes of the NONMAIN region take effect after the next hard reset / power cycle.
• The device can be locked (non-)permanently by writing NONMAIN.
• If the CRC of the BCR and/or BSL blocks are not matching the related data, the device is permanently locked.
• Erasing this region will lead to a non-matching CRC, thus locking the device permanently.

Note:

1. To prevent unintentional locking of the device, J-Link has special handling when programming the NONMAIN region:
   • Return an error when the user tries to erase the NONMAIN region. Erase will be done implicitly when programming it.
   • Programming will return an error and will neither erase nor program the NONMAIN region in case the user tries to flash data with invalid CRC values.
2. The user may program program BCR and BSL regions separately. However, this is only possible as long as the RMW threshold is not manually reduced to < 512 bytes by the user (default is 1 KB).

Device Specific Handling

Connect

Some device specific debug bits are set which prevents the device to enter sleep mode / allows debugging of applications which make use of low power modes.

Watchdog

The MSPM0G devices have two windowed watchdogs implemented (WWDG). Apparently, the watchdog counter cannot be read directly. For this reason flash programming is only supported for devices where the watchdogs are not running in window mode.
Supported watchdog settings:

• Disabled
• Enabled (non-window mode)

Reset

A device specific reset is performed for this device. This is because the peripherals are not reset when executing the Cortex-M default reset. A SYSRST is executed via the device specific SYSCTL register instead.

Evaluation Boards

• TI LP-MSPM0G3507 evaluation board
• TI LP-MSPM0G3519 evaluation board
• TI LP-MSPM0G5117 evaluation board

Example Application

• Example for TI LP-MSPM0G3507
• Example for TI LP-MSPM0G3519
• Example for TI LP-MSPM0G5117