ST STM32C0
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The ST STM32C0 series are microcontrollers based on the Arm®
Cortex®-M0+ processor.
Flash Banks
Internal Flash
| Device | Base address | Size | J-Link Support |
|---|---|---|---|
| STM32C0xxx4 | 0x08000000 | 16 KB | 
|
| STM32C0xxx6 | 0x08000000 | 32KB |
|
| STM32C0xxx8 | 0x08000000 | 64KB |
|
| STM32C0xxxB | 0x08000000 | 128KB |
|
Watchdog Handling
The device has two watchdogs IWDG and WWDG that are not fed during flash programming.
Device Specific Handling
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Option byte programming
Option byte programming is implemented in Device Provisioner utility: https://wiki.segger.com/ST_STM32C0_Option_Bytes_Programming.
Securing/unsecuring the device
Securing/unsecuring the device can be performed by programming FLASH_OPTR register using Device Provisioner utility.