Nordic Semiconductor nRF54Lxx
The Nordic Semiconductor nRF54L are ultra low-power multiprotocol wireless System-on-Chip (SoC) supporting Bluetooth Low Energy, Bluetooth mesh, Thread, and Matter technologies.
Flash Banks
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| RRAM | 0x00000000 | 
|
Default | up to 2036 KB |
| UICR | 0x00FFD000 |
|
Default | 2560 B |
| OTP | 0x00FFD500 | 
|
- | - |
The UICR flash bank holds configuration information and it can only be erased by a chip erase (ERASEALL).
The chip erase is executed when the UICR flash bank is erased.
Programming can only be done when destination is in erased state.
Smallest programming size is 4 bytes.
Watchdog Handling
- The device has two watchdogs WDT30 and WDT31.
- The watchdogs are fed during flash programming.
Multi-Core Support
Before proceeding with this article, please check out the generic article regarding Multi-Core debugging here.
The nRF54Lxx family comes with a variety of multi-core options.
| Core | J-Link Support |
|---|---|
| Cortex-M33 |
|
| RISC-V RV32 |
|
In below, the debug related multi-core behavior of the J-Link is described for each core:
Main core
Attach
- Attach is supported.
Device Specific Handling
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
RISC-V core
Attach
- Attach is supported.
Device Specific Handling
Reset
- The device uses normal RISC-V reset, no special handling necessary, like described here.
Limitations
RISC-V security attributes
After device start-up, RAM and RRAM memory regions are treated as secure. To allow RISC-V core execute from these regions, the core is configured as secure peripheral.
Security
The nRF54Lxx Series uses special debug locking mechanism. To gain access to debugging features the following steps should be performed: 1) UICR registers should be configured to enable debug port. 2) User application should set corresponding registers to open access to debug port. Optionally J-Link can perform a full chip erase, to temporarily reopen debug access until next power reset.
Evaluation Boards
- Nordic Semiconductor nRF54L05-DK
- Nordic Semiconductor nRF54L10-DK
- Nordic Semiconductor nRF54L15-PDK
- Nordic Semiconductor nRF54L20-QFN-PDK