NXP MCX A

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The NXP MCX A are single core ARM Cortex-M33 microprocessors.

Flash Banks

MCX A17x/A18x/A25x/A34x/A35x

Flash bank Base address J-Link support Flasher support Loader
Name Bank size
Internal Flash 0x00000000 YES.png YES.png Default Up to 1 MB


MCX A265/A365

Flash bank Base address J-Link support Flasher support Loader
Name Bank size
Internal Flash 0x00000000 YES.png YES.png Default 448 KB
Secure Installer[1] 0x00070000 YES.png YES.png Default 56 KB
CMPA 0x007E0000 YES.png YES.png Default 8 KB


MCX A266/A366

Flash bank Base address J-Link support Flasher support Loader
Name Bank size
Internal Flash 0x00000000 YES.png YES.png Default 960 KB
Secure Installer[1] 0x000F0000 YES.png YES.png Default 56 KB
CMPA 0x00FE0000 YES.png YES.png Default 8 KB
  1. ↑ 1.0 1.1 Secure Installer has to be deleted in order to program this area.

ECC Flash

  • Device has ECC Flash, but no special handling required.

Secure Installer

  • Some derivatives come with a secure installer(SI).
  • The secure installer can be deleted by the Device Provisioner: MCX A SiErase .
  • When this secure installer is removed, a device unique token is present in the CMPA area.
Warning:
This device unique token has to be has to be resident forever in the CMPA area, otherwise the device will be bricked.

Watchdog Handling

  • The device has up to two WWDT and CDOG watchdogs.
  • The WWDT watchdogs are fed during flash programming.
  • No handling for CDOG watchdogs implemented.

Device Specific Handling

Reset

  • The J-Link performs a device specific reset sequence. SRAM and Flash is set to RWX.

Attach

Attach is supported.

Evaluation Boards

Example Application

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