ST STR7
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The ST STR7 are microcontrollers based on the ARM7TDMI core.
Flash Banks
Internal Flash
| Device | Base address | Size | J-Link Support |
|---|---|---|---|
| STR71xFx0 | 0x40000000 | 80KB | 
|
| STR71xFx1 | 0x40000000 | 144KB |
|
| STR71xFx2 | 0x40000000 | 272KB |
|
| STR73xFx0 | 0x80000000 | 64KB |
|
| STR73xFx1 | 0x80000000 | 128KB |
|
| STR73xFx2 | 0x80000000 | 256KB |
|
| STR75xFx0 | 0x20000000 | 64KB |
|
| STR75xFx1 | 0x20000000 | 128KB |
|
| STR75xFx2 | 0x20000000 | 256KB |
|
Watchdog Handling
The device has a watchdog that is not fed during flash programming.
Device Specific Handling
Reset
The device uses ARM7/9 reset, no special handling necessary, like described here.
JTAG settings
We recommend to use adaptive clocking for these devices (use Speed adaptive in J-Link Commander).