Renesas RX74 device family
The Renesas RX74x are microcontrollers from Renesas, which are based on the RXv3e architecture. This architecture introduces ProtectZone, which is a security feature similar to ARM TrustZone and divides the memory space into secure and non-secure addresses.
There are two sub families RX74M and RX74N.
Supported devices
Refer to the supported device list for a full list of all supported RX74 family devices, their corresponding names and connection diagrams.
Target interfaces
| Interface | J-Link support | Flasher support |
|---|---|---|
| JTAG |  |
|
| FINE | |
|
| SWD | |
|
MRAM banks
The device uses MRAM as internal non-volatile memory storage.
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| OSM Secure | 0x86E00000 | |
|
Default | |
| OSM Non-secure | 0x06E00000 | |
|
Default | |
| Data area Secure | 0x86900000 | |
|
Default | 48KB |
| Data area Non-secure | 0x06900000 | |
|
Default | 48KB |
| Code area Secure | 0xFFF80000 | |
|
Linear mode | 512 KB |
| Code area Non-secure | 0x7FF80000 | |
|
Linear mode | 512 KB |
| Code area Secure | 0x7FF00000 | |
|
Linear mode | 1 MB |
| Code area Non-secure | 0xFFF00000 | |
|
Linear mode | 1 MB |
Limitations
- Dual bank setups are not supported yet. Please get in touch with SEGGER support support@segger.com.
- RAMless flash programming is not supported.
External flash banks
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
J-Link supports multiple pin configurations for this Device. The default loader is marked in bold. For details on how to select a specific flash loader, please see here.
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| XSPI0 CS1 | 0x20000000 | |
|
Default | 256MB |
| XSPI0 CS0 | 0x30000000 | |
|
Default | 256MB |
| XSPI1 CS1 | 0x40000000 | |
|
Default | 256MB |
| XSPI1 CS0 | 0x50000000 | |
|
Default | 256MB |
J-Link supports one pin configuration for XSPI0.
| Pin name | Port | Pin |
|---|---|---|
| XSPI0_CK | D | 1 |
| XSPI0_IO0 | D | 2 |
| XSPI0_IO1 | D | 3 |
| XSPI_WP0 | D | 4 |
| XSPI_WP1 | 9 | 3 |
| XSPI_CS0 | D | 7 |
| XSPI_CS1 | D | 0 |
J-Link supports one pin configuration for XSPI1.
| Pin name | Port | Pin |
|---|---|---|
| XSPI0_CK | E | 1 |
| XSPI0_IO0 | E | 2 |
| XSPI0_IO1 | E | 3 |
| XSPI_WP0 | E | 4 |
| XSPI_WP1 | 7 | 6 |
| XSPI_CS0 | E | 7 |
| XSPI_CS1 | E | 0 |
Watchdog handling
- The device has 2 watchdogs WDTA and IWDT.
- The watchdogs are fed during flash programming.
Device specific handling
Reset
- The device uses default RX reset, no special handling necessary, like described here.
Attach
Attach is a debugging feature which exclusively applies to J-Link and J-Trace and does not apply to Flasher.
- Attach is not supported by these devices.
Limitations
ProtectZone is not yet fully supported by J-Link. J-Link currently enforces Authentication Level 2 (AL2) when connecting to the target device.
Full ProtectZone support is planned for a future J-Link release.
Debugger Authentication
If necessary, a debugger authentication via RX ID Code is performed as part of the connect sequence.
See article on Renesas RX cores for further information.
Debug Mode
When using FINE interface, a debug mode is enabled as part of the connect sequence and disabled on debug session close.
Enabling / disabling the debug mode requires writing to the flash.
See article on Renesas RX cores for further information.