User contributions for Matthias

26 June 2025

• 13:2213:22, 26 June 2025 diff hist −8‎ J-Link Command Strings ‎ →‎SuppressControlPanel
• 13:2113:21, 26 June 2025 diff hist +166‎ J-Link Command Strings ‎ →‎SuppressControlPanel
• 13:2113:21, 26 June 2025 diff hist +158‎ J-Link Command Strings ‎ →‎SilentUpdateFW
• 13:2013:20, 26 June 2025 diff hist +158‎ J-Link Command Strings ‎ →‎SuppressInfoUpdateFW
• 09:4509:45, 26 June 2025 diff hist 0‎ J-Link Command Strings ‎ →‎List of available commands

24 June 2025

• 09:3709:37, 24 June 2025 diff hist +1,923‎ Tongxin THA6 Gen 2 ‎ →‎Flash Banks

13 June 2025

• 16:3016:30, 13 June 2025 diff hist −1‎ Xilinx Zynq UltraScalePlus ‎No edit summary current

27 May 2025

• 15:0015:00, 27 May 2025 diff hist 0‎ N File:ESWIN EAM2011 FULLMASK EVB.jpg ‎No edit summary current
• 14:0414:04, 27 May 2025 diff hist 0‎ N File:ESWIN EAM2011 TestProject ES V822a.zip ‎No edit summary current
• 14:0314:03, 27 May 2025 diff hist +2‎ ESWIN EAM2011 FULLMASK EVB ‎No edit summary current
• 14:0014:00, 27 May 2025 diff hist 0‎ N File:ESWIN EAM2011 CONNECT.PNG ‎No edit summary current
• 14:0014:00, 27 May 2025 diff hist −5‎ ESWIN EAM2011 FULLMASK EVB ‎No edit summary
• 13:5913:59, 27 May 2025 diff hist +908‎ N ESWIN EAM2011 FULLMASK EVB ‎ Created page with "Category:Evalboards __TOC__ This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.<br> 450px == Preparing for J-Link == *Connect the J-Link to 20-pin JTAG connector (J44). *Power the board via the DC 12V power jack (J60). * Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output shou..."
• 13:5413:54, 27 May 2025 diff hist +1,362‎ N ESWIN EAM2011 ‎ Created page with "Category:Device families The '''ESWIN EAM2011''' are RISC-V based microcontrollers. __TOC__ ==Flash Banks== ===Device Group1=== {{:Template:FlashBankTable | FlashBanks= {{:Template:FlashBankTableRow | BankName=PFLASH | BaseAddress=0x10000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= {{:Template:FlashLoader | Name=Default | Size=1 MB }} }} {{:Template:FlashBankTableRow | BankName=DFLASH | BaseAddress=0x12000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= {{:Tem..."

23 May 2025

• 15:4115:41, 23 May 2025 diff hist +1‎ NXP MCX E31 ‎ →‎=ECC RAM
• 15:4015:40, 23 May 2025 diff hist −1‎ NXP MCX E31 ‎ →‎ECC RAM
• 15:4015:40, 23 May 2025 diff hist +1,968‎ N NXP MCX E31 ‎ Created page with "Category:Device families __TOC__ The '''NXP MCX E''' are Arm Cortex-M7 microprocessors.<br> ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | Code flash 0 || 0x00400000 || Up to 1 MB || style="text-align:center;"| {{YES}} |- | Code flash 1 || 0x00500000 || Up to 1 MB || style="text-align:center;"| {{YES}} |- | Code flash 2 || 0x00600000 || Up to 1 MB || style="text-align:center;"| {{YES}} |-..."

16 May 2025

• 12:5112:51, 16 May 2025 diff hist +16‎ J-Link Device Support Kit ‎No edit summary

7 May 2025

• 09:2509:25, 7 May 2025 diff hist −2‎ SEGGER Flash Loader ‎ →‎SEGGER_FL_CalcCRC
• 09:2509:25, 7 May 2025 diff hist −3‎ SEGGER Flash Loader ‎ →‎SEGGER_FL_Start

5 May 2025

• 17:1417:14, 5 May 2025 diff hist +49‎ Xilinx Zynq UltraScalePlus ‎ →‎Limitations

9 April 2025

• 14:5714:57, 9 April 2025 diff hist −55‎ RZ A1L ‎No edit summary current

7 April 2025

• 11:1111:11, 7 April 2025 diff hist 0‎ NXP ‎ →‎Information on supported devices
• 11:1011:10, 7 April 2025 diff hist +197‎ NXP ‎ →‎Information on supported devices
• 11:0811:08, 7 April 2025 diff hist 0‎ N File:NXP IMXRT700 CONNECT.PNG ‎No edit summary current
• 11:0811:08, 7 April 2025 diff hist 0‎ N File:NXP IMXRT700.jpg ‎No edit summary current
• 11:0811:08, 7 April 2025 diff hist +478‎ N NXP MIMXRT700-EVK ‎ Created page with "__TOC__ This article describes specifics for the NXP MIMXRT700-EVK evaluation board.<br> 450px == Preparing for J-Link == *Connect the J-Link to the MIMXRT700-EVK via J18 (20 Pin). *Power the board via J40: (Micro USB). * Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: 400px" current
• 11:0211:02, 7 April 2025 diff hist +28‎ N NXP i.MXRT700 ‎ Matthias moved page NXP i.MXRT700 to NXP i.MX RT700 current Tag: New redirect
• 11:0211:02, 7 April 2025 diff hist 0‎ m NXP i.MX RT700 ‎ Matthias moved page NXP i.MXRT700 to NXP i.MX RT700
• 11:0011:00, 7 April 2025 diff hist +1,380‎ N NXP i.MX RT700 ‎ Created page with "The '''NXP i.MXRT700''' are multi-core MCUs consisting of two Cortex-M33 and one RISC-V cores. __TOC__ ==Flash Banks== ===QSPI Flash=== QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.<br> {| class="seggertable" |- ! Bank !! Base address !! Maximum size |- | XSPI1 || 0x08000000 || 128 MB |- | XSPI0 || 0x28000000 || 128..."

20 March 2025

• 11:2911:29, 20 March 2025 diff hist +276‎ Nordic Semiconductor nRF91 ‎ →‎Supported Regions

17 March 2025

• 15:5815:58, 17 March 2025 diff hist 0‎ J-Link Device Support Kit ‎ →‎XML-tag LoaderInfo

13 March 2025

• 14:4814:48, 13 March 2025 diff hist +206‎ J-Link Command Strings ‎ →‎SetCompareMode

11 March 2025

• 16:5616:56, 11 March 2025 diff hist −3,068‎ Tongxin THA6 Gen 2 ‎No edit summary
• 14:5614:56, 11 March 2025 diff hist +5,733‎ N Tongxin THA6 Gen 2 ‎ Created page with "Category:Device families The '''Tongxin THA6 Gen 2''' device family are Cortex-R52 based microcontrollers. __TOC__ ==Flash Banks== {{:Template:FlashBankTable | FlashBanks= {{:Template:FlashBankTableRow | BankName=PFLASH0<ref name="FootNote1" >Enabled by default</ref> | BaseAddress=0x08000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= {{:Template:FlashLoader | Name=Default | Size=3 MB }} }} {{:Template:FlashBankTableRow | BankName=PFLASH1<ref name="FootNote1" >Ena..."

6 March 2025

• 14:5514:55, 6 March 2025 diff hist +156‎ Renesas RA6M4 flash loaders ‎ →‎Supported pin configurations current

5 March 2025

• 15:3215:32, 5 March 2025 diff hist +561‎ N HPMicro HPM5E ‎ Created page with "Category:Device families __TOC__ The '''HPMicro HPM5Exx''' device series are RISC-V based 32-bit microcontrollers. ==SPI flash support== J-Link supports the internal SPI flash of HPM5Exx through the XPI-API. {{Note|Since the full documentation is currently not available, the flashloader is based on code provided by HPMicro. This currently has the limitation where programming is only supported after reset. Programming and flash breakpoints may work without reset, but..." current
• 15:3015:30, 5 March 2025 diff hist +721‎ N HPMicro HPM6P ‎ Created page with "Category:Device families __TOC__ The '''HPMicro HPM6Pxx''' device series are RISC-V based 32-bit microcontrollers. ==SPI flash support== J-Link supports SPI-flashes with HPM6Pxx through the XPI-API. {{Note|Since the full documentation is currently not available, the flashloader is based on code provided by HPMicro. This currently has the limitation where programming is only supported after reset. Programming and flash breakpoints may work without reset, but it is no..." current

26 February 2025

• 10:2210:22, 26 February 2025 diff hist +73‎ ST STM32H7 ‎ →‎QSPI Support current

21 February 2025

• 17:3017:30, 21 February 2025 diff hist −7‎ NXP LPC54xx ‎No edit summary current
• 17:0617:06, 21 February 2025 diff hist +1,166‎ NXP LPC54xx ‎No edit summary

6 February 2025

• 09:4209:42, 6 February 2025 diff hist −86‎ Renesas RZ/N2H ‎No edit summary current
• 09:4209:42, 6 February 2025 diff hist 0‎ N File:Renesas RZN2H Evaluation Board.jpg ‎No edit summary current
• 09:4109:41, 6 February 2025 diff hist 0‎ N File:Renesas RZN2H Evaluation Board connect.PNG ‎No edit summary current
• 09:4109:41, 6 February 2025 diff hist +502‎ N Renesas RZ/N2H-RSK ‎ Created page with "Category:Evalboards __TOC__ This article describes specifics for the Renesas RZ/N2H evaluation board.<br> 450px == Preparing for J-Link == * Connect the J-Link to CN23 or CN24. * Power the board via CN35. * Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: File:Renesas_RZN2H_Evaluatio..." current

27 January 2025

• 15:3315:33, 27 January 2025 diff hist +51‎ ST STM32H7 ‎ →‎Supported pin configurations

15 January 2025

• 10:3310:33, 15 January 2025 diff hist +194‎ J-Link Multiple Flashloader ‎ →‎J-Flash
• 10:3310:33, 15 January 2025 diff hist 0‎ N File:Ozone select flashloader.png ‎No edit summary current

2 January 2025

• 11:5611:56, 2 January 2025 diff hist +38‎ J-Link RAM initialization ‎No edit summary current

12 December 2024

• 10:3710:37, 12 December 2024 diff hist +191‎ AlifSemi ‎ →‎Information on supported devices current