Renesas RA4L1: Difference between revisions

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==Watchdog Handling==
==Watchdog Handling==
*The device has a 2 watchdogs WDT and IWDT.  
*The device has two watchdogs WDT and IWDT.  
*If a watchdog is enabled, it is is fed during flash programming.
*If a watchdog is enabled, it is is fed during flash programming.



Latest revision as of 17:56, 11 August 2025

The Renesas RA4L1 are Arm Cortex-M33 Based Low Power MCU with TrustZone, Segment LCD Controller and Advanced Security.

Flash Banks

Flash Bank Base address J-Link Support Loader
Name Size
Code flash 0x00000000 YES.png Default Up to 512 KB
RAMLess Up to 512 KB
Option bytes 0x0100A100 YES.png Default 512 B
RAMLess 512 B
Data Flash 0x08000000 YES.png Default 8 KB
RAMLess 8 KB
QSPI Flash [1] 0x60000000 YES.png CLK@P500_nCS@P501_D0@P502_D1@P503_D2@P504_D3@P505 up to 64MB
CLK@P104_nCS@P112_D0@P101_D1@P100_D2@P103_D3@P102 up to 64MB
CLK@P204_nCS@P207_D0@P211_D1@P210_D2@P209_D3@P208 up to 64MB
  1. QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
    J-Link supports multiple pin configurations for this Device. The default loader is marked in bold. For details on how to select a specific flash loader, please see here.

Watchdog Handling

  • The device has two watchdogs WDT and IWDT.
  • If a watchdog is enabled, it is is fed during flash programming.

Device Specific Handling

Connect

  • On connect it is checked if TrustZone is enabled.
    The transfer type(S/NS) is adjusted from this setting.

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application