Renesas RA4L1
The Renesas RA4L1 are Arm Cortex-M33 Based Low Power MCU with TrustZone, Segment LCD Controller and Advanced Security.
Supported devices
Refer to the supported device list for a full list of all supported RA4L1 family devices, their corresponding names and connection diagrams.
Target interfaces
| Interface | J-Link support | Flasher support |
|---|---|---|
| SWD |  |
|
| JTAG |  |
|
Flash Banks
Internal Flash
J-Link supports multiple loaders for the internal program flash bank. The default loader is marked in bold. For details on how to select a specific flash loader, please see here.
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| Code flash | 0x00000000 | |
|
Default | Up to 512 KB |
| RAMLess | Up to 512 KB | ||||
| DualBank | Up to 512 KB | ||||
| Option bytes | 0x0100A100 | |
|
Default | 512 B |
| RAMLess | 512 B | ||||
| Data Flash | 0x08000000 | |
|
Default | 8 KB |
| RAMLess | 8 KB | ||||
Single Bank Mode
All loaders for the internal program flash bank, except the DualBank loader, require the device to be configured for single-bank (linear) mode via DUALSEL.BANKMD[2:0]. The configuration takes effect after a reset.
Dual Bank Mode
J-Link supports dual bank mode for the internal program flash bank. Notes on how to use the DualBank loader:
- The device must be configured for dual-bank mode via DUALSEL.BANKMD[2:0]. The configuration takes effect after a reset.
- The DualBank loader supports startup bank swapping.
- The DualBank loader uses logical flash addresses for programming and erase operations. The hardware maps these addresses to the corresponding physical bank.
- The user is responsible for ensuring that the desired physical bank is mapped to the expected logical address before programming.
External QSPI flash
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
J-Link supports multiple pin configurations for this device. The default loader is marked in bold. For details on how to select a specific flash loader, please see here.
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| QSPI Flash | 0x60000000 | |
|
CLK@P500_nCS@P501_D0@P502_D1@P503_D2@P504_D3@P505 | up to 64MB |
| CLK@P104_nCS@P112_D0@P101_D1@P100_D2@P103_D3@P102 | up to 64MB | ||||
| CLK@P204_nCS@P207_D0@P211_D1@P210_D2@P209_D3@P208 | up to 64MB | ||||
For pin configurations, different from the ones mentioned above, please get in touch with SEGGER directly via our support system: https://www.segger.com/ticket/.
Watchdog Handling
- The device has two watchdogs WDT and IWDT.
- If a watchdog is enabled, it is is fed during flash programming.
Device Specific Handling
Connect
- On connect it is checked if TrustZone is enabled.
The transfer type(S/NS) is adjusted from this setting.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
Device Lifecycle Management
- DLM is supported using a Flasher, see Renesas DLM.