Renesas RA4L1: Difference between revisions
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{{:Template:FlashBankTable | {{:Template:FlashBankTable | ||
| FlashBanks= | | FlashBanks= | ||
{{:Template:FlashBankTableRow | BankName=Code | {{:Template:FlashBankTableRow | BankName=Code flash | BaseAddress=0x00000000 | JLinkSupport=yes | NumOfLoaders=2 | Loader= | ||
{{:Template:FlashLoader | Name='''Default''' | Size= | {{:Template:FlashLoader | Name='''Default''' | Size=Up to 512 KB }} | ||
{{:Template:FlashLoader | Name=RAMLess | Size= | {{:Template:FlashLoader | Name=RAMLess | Size=Up to 512 KB }} | ||
}} | |||
{{:Template:FlashBankTableRow | BankName=Option bytes | BaseAddress=0x0100A100 | JLinkSupport=yes | NumOfLoaders=2 | Loader= | |||
{{:Template:FlashLoader | Name='''Default''' | Size=512 B }} | |||
{{:Template:FlashLoader | Name=RAMLess | Size=512 B }} | |||
}} | }} | ||
{{:Template:FlashBankTableRow | BankName=Data Flash | BaseAddress=0x08000000 | JLinkSupport=yes | NumOfLoaders=2 | Loader= | {{:Template:FlashBankTableRow | BankName=Data Flash | BaseAddress=0x08000000 | JLinkSupport=yes | NumOfLoaders=2 | Loader= | ||
{{:Template:FlashLoader | Name='''Default''' | Size= | {{:Template:FlashLoader | Name='''Default''' | Size=8 KB }} | ||
{{:Template:FlashLoader | Name=RAMLess | Size= | {{:Template:FlashLoader | Name=RAMLess | Size=8 KB }} | ||
}} | }} | ||
{{:Template:FlashBankTableRow | BankName=QSPI Flash <ref name="FootNote1" > | {{:Template:FlashBankTableRow | BankName=QSPI Flash <ref name="FootNote1" > | ||
| Line 31: | Line 31: | ||
==Watchdog Handling== | ==Watchdog Handling== | ||
*The device has | *The device has two watchdogs WDT and IWDT. | ||
*If a watchdog is enabled, it is is fed during flash programming. | *If a watchdog is enabled, it is is fed during flash programming. | ||
Latest revision as of 17:56, 11 August 2025
The Renesas RA4L1 are Arm Cortex-M33 Based Low Power MCU with TrustZone, Segment LCD Controller and Advanced Security.
Flash Banks
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| Code flash | 0x00000000 | 
|
Default | Up to 512 KB |
| RAMLess | Up to 512 KB | |||
| Option bytes | 0x0100A100 |
|
Default | 512 B |
| RAMLess | 512 B | |||
| Data Flash | 0x08000000 |
|
Default | 8 KB |
| RAMLess | 8 KB | |||
| QSPI Flash [1] | 0x60000000 |
|
CLK@P500_nCS@P501_D0@P502_D1@P503_D2@P504_D3@P505 | up to 64MB |
| CLK@P104_nCS@P112_D0@P101_D1@P100_D2@P103_D3@P102 | up to 64MB | |||
| CLK@P204_nCS@P207_D0@P211_D1@P210_D2@P209_D3@P208 | up to 64MB | |||
- ↑
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
J-Link supports multiple pin configurations for this Device. The default loader is marked in bold. For details on how to select a specific flash loader, please see here.
Watchdog Handling
- The device has two watchdogs WDT and IWDT.
- If a watchdog is enabled, it is is fed during flash programming.
Device Specific Handling
Connect
- On connect it is checked if TrustZone is enabled.
The transfer type(S/NS) is adjusted from this setting.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.