TI RM48Lx

The TI RM48Lx are high-performance, safety-critical Cortex-R4F based microcontrollers, designed for real-time automotive and industrial applications with built-in functional safety features.

Flash Banks

RM48L5x, RM48L7x

Flash Bank	Base address	J-Link Support	Loader
			Name	Size
Internal flash	0x00000000		Default	2048 KB
			No_auto_ECC	2048 KB
EEP flash	0xF0200000		Default	64 KB
			No_auto_ECC	64 KB
OTP flash	0xF0000000		Default	4 KB

RM48L9x

Flash Bank	Base address	J-Link Support	Loader
			Name	Size
Internal flash	0x00000000		Default	3072 KB
			No_auto_ECC	3072 KB
EEP flash	0xF0200000		Default	64 KB
			No_auto_ECC	64 KB
OTP flash	0xF0000000		Default	4 KB

ECC flash automatic generation

• When programming internal Flash or EEPROM banks, ECC is generated automatically when using the “Default” loader and is not generated when using the “No_auto_ECC” loader.

ECC RAM

• RAM is initialized during target setup phase.

Watchdog Handling

• The device has two watchdogs DWD and DWWD.
• The watchdog are fed during flash programming.

Device Specific Handling

Reset

• The device uses custom reset: Reset is performed using reset vector catch feature and ICEPick interface trigger.

Limitations

Dual Core Support

• Although the RM48Lx series is a dual Cortex-R4F MPU, the cores always operate in lock-step mode (synchronous operation for redundancy and safety).

Attach

• Attach is not supported by default because the J-Link initializes RAM for correct ECC operation by default.

Evaluation Boards

• TI RM48 HDK

Example Application

• TI RM48 HDK Example