Renesas RX610
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The Renesas RX610 are microcontrollers from Renesas, which are based on the RX architecture.
Flash Banks
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| Internal flash[1] | 0x00100000 | 
|
Default | 800/1056/1568/2080 KB |
- ↑
The flash bank "Internal flash" internally functions as two flash banks.
One bank at 0x00100000 (32 KB)
and one bank at 0xFFE40000/0xFFE00000/0xFFD80000/0xFFD00000 (768/1024/1536/2048 KB).
Debugger Authentication
If necessary, a debugger authentication via RX ID Code is performed as part of the connect sequence.
See article on Renesas RX cores for further information.
Debug Mode
When using FINE interface, a debug mode is enabled as part of the connect sequence and disabled on debug session close.
Enabling / disabling the debug mode requires writing to the flash.
See article on Renesas RX cores for further information.
Supported debug interfaces
The following debug interfaces are supported:
- JTAG
- FINE