Renesas RX24T
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The Renesas RX24T are microcontrollers which are based on the RXv2 architecture.
Supported devices
Refer to the supported device list for a full list of all supported RX24T family devices, their corresponding names and connection diagrams.
Target interfaces
| Interface | J-Link support | Flasher support |
|---|---|---|
| FINE |  |
|
Flash banks
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| Internal flash[1] | 0x00100000 | |
|
Default | 8 KB + up to 512 KB |
- ↑
The flash bank "Internal flash" internally functions as two flashbanks.
One bank at 0x00100000 (8 KB) and one bank at 0xFFFE0000/0xFFFC0000/0xFFFA0000/0xFFF80000 (128/256/384/512 KB).
Watchdog Handling
- The device has one watchdog: IWDTa
- The watchdog is fed during flash programming.
Device specific handling
Reset
- The device uses default RX reset, no special handling necessary, like described here.
Attach
Attach is a debugging feature which exclusively applies to J-Link and J-Trace and does not apply to Flasher.
- Attach is not supported for RX24T.
Debugger Authentication
If necessary, a debugger authentication via RX ID Code is performed as part of the connect sequence.
See article on Renesas RX cores for further information.
Debug Mode
When using FINE interface, a debug mode is enabled as part of the connect sequence and disabled on debug session close.
Enabling / disabling the debug mode requires writing to the flash.
See article on Renesas RX cores for further information.