Renesas RX210
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The Renesas RX210 are microcontrollers from Renesas, which are based on the RXv1 architecture.
Flash Banks
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| Internal flash[1] | 0x00100000 | 
|
Default | 72/104/136/264/392/520/776/1032 KB |
- ↑
The flash bank "Internal flash" internally functions as two flashbanks.
One bank at 0x00100000 (8 KB)
and one bank at 0xFFEF0000/0xFFEE8000/0xFFEE0000/0xFFEC0000/0xFFEA0000/0xFFE80000/0xFFE40000/0xFFE00000 (64/96/128/256/384/512/768/1024 KB).
Debugger Authentication
If necessary, a debugger authentication via RX ID Code is performed as part of the connect sequence.
See article on Renesas RX cores for further information.
Debug Mode
When using FINE interface, a debug mode is enabled as part of the connect sequence and disabled on debug session close.
Enabling / disabling the debug mode requires writing to the flash.
See article on Renesas RX cores for further information.
Supported debug interfaces
The following debug interfaces are supported:
- FINE