Renesas RA0L1

The Renesas RA0L1 are Cortex-M23 based microcontrollers.

Internal Flash

Flash Bank	Base address	Size	J-Link Support	Loaders
Program flash	0x00000000	Up to 64 KB		Default
Data flash	0x40100000	1 KB		Default

NOTE:The device has an Independent Watchdog Timer (IWDT) which is fed during flash programming.

Device Specific Handling

Connect

• Authentication via IDCODE is supported
• Wake-up CPU from low-power mode is supported
• Connect under reset is supported

Reset

• The devices uses normal Cortex-M reset, no special handling necessary, like described here.

Disconnect

On disconnect, the J-Link restores device specific settings which are required to support low power mode debugging but may result in an increased power consumption if not disabled.

Evaluation Boards

• Renesas FPB-RA0L1

Example Application

• Renesas FPB-RA0L1