Renesas DA1453x

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The Renesas DA1453x are ultra-low power SoC integrating a 2.4 GHz transceiver and an Arm® Cortex®-M0+ microcontroller.

Flash Banks

Flash Bank Base address J-Link Support Loader
Name Size
OTP 0x07F83000 NO.png n/a n/a
SPI external flash [1] 0x16000000 YES.png Default up to 64 MB
  1. QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
    J-Link supports multiple pin configurations for this Device. The default loader is marked in bold. For details on how to select a specific flash loader, please see here.

The flash bank SPI external flash does is not memory mapped available, the base address is a virtual address.

Watchdog Handling

  • The device has a watchdog [WDOG].
  • The watchdog is freezed during flash programming.

Device Specific Handling

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards