NXP MCX C15
Jump to navigation
Jump to search
The NXP MCX C15 are are single core ARM Cortex-M23 microprocessors.
Supported devices
Refer to the supported device list for a full list of all supported MCX C15 family devices, their corresponding names and connection diagrams.
Target interfaces
| Interface | J-Link support | Flasher support |
|---|---|---|
| SWD |  |
|
Flash banks
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| Program Flash | 0x00000000 | |
|
default | Up to 64 KB |
RAM
- The device has ECC RAM, which is initialized on connect.
Watchdog handling
- The device has two watchdogs, WWDT0 & WWDT1.
- The watchdogs are fed during flash programming if they are enabled.
Device specific handling
Reset
- J-Link performs a device specific reset sequence.
Attach
Attach is a debugging feature which exclusively applies to J-Link and J-Trace and do not apply to Flasher.
- Attach is supported if ECC RAM initialization is skipped.