Infineon PSC1

The Infineon PSOC Control C1 are Cortex-M0 based MCUs and address real-time control needs of motor control and digital power conversion.

Supported devices

Refer to the supported device list for a full list of all supported PSOC Control C1 family devices, their corresponding names and connection diagrams.

Target interfaces

Interface	J-Link support	Flasher support
SWD

Flash banks

Flash bank	Base address	J-Link support	Flasher support	Loader
				Name	Bank size
Internal flash	0x10001000			Default	Up to 200 KB

Watchdog handling

• The device has a watchdog WDT.
• The watchdog is not fed during flash programming.

Device specific handling

Reset

• The device uses custom reset as PSOC Control C1 series devices feature a ROM BTL which needs to be executed after reset. The J-Link DLL performs this special reset automatically if the correct device is selected.

Attach

Attach is a debugging feature which exclusively applies to J-Link and J-Trace and does not apply to Flasher.

• Attach is supported / desired

Boot Mode Index

The PSOC Control C1 series devices support different boot modes. The actual boot mode is configured in the Boot Mode Index (BMI) which is a 2 byte value stored in the flash and holding information about the boot mode (start-up mode) and the debug configuration of the device. Depending on the configured boot mode, different debug pins are used for the debug communication. For an overview of all different boot modes and the used debug pins, please refer to Overview BMI Modes.

Problem

The PSOC Control C1 series devices are shipped with boot mode ASC Bootstrap Loader mode (ASC_BSL). Unfortunately, the debug interface of the device is disabled in this mode. So when using J-Link or Flasher, the boot mode needs to be changed prior a target connection can be established.

Solution

SEGGER J-Links / Flashers

By default, J-Link / Flasher changes the BMI from ASC_BSL to SWD0 (P0.14 & P015 used for SWD) if the BMI of the device is ASC_BSL. If a BMI other than SWD0 is required, the default behavior can be simply overwritten using a J-Link Script File. Please find below script files for the other boot modes:

• ASC_BSL to SWD1: PCode_Infineon_PSC1_SWD1.pex
• ASC_BSL to SPD0: PCode_Infineon_PSC1_SPD0.pex
• ASC_BSL to SPD1: PCode_Infineon_PSC1_SPD1.pex

Please note that the J-Link Script Files are pre-compiled (*.pex) thus they neither contain plaintext nor can be modified. If you feel that you need a modified version of the script file, please get in contact with SEGGER directly (e.g. via E-Mail / forum). For further information how to use the J-Link Script File in your environment please refer to here.

Production programming

In order to change the BMI after programming, a sequence of Exit Steps can be used in our production programming solution JFlash.
The following example J-Flash project changes the BMI back to ASC_BSL after programming:
Infineon_PSC1_Example.jflash
For other BMI modes, the value in Step 6 (ASC_BSL) needs to be changed accordingly. For the BMI values please refer to Overview BMI Modes.

On-Board J-Links on Infineon eval boards

For on-board J-Links (J-Link OB) on the Infineon eval board, the automatic switching is not supported. There is a separate utility available in the Infineon DAVE IDE that allows switching between the BMIs via the J-Link OB. This utility does not work with other J-Link models.

J-Link EDU Mini

For J-Link EDU Mini, the automatic switching is not supported, as pin override for J-Link EDU Mini is not supported. For support of the automatic switching sequence at minimum a J-Link Base or EDU is required.

NOTE

1. The required switching sequence needs to be performed over a half-duplex UART communication on the TMS/SWDIO pin (Pin7). Thus this pin needs to be connected to be able to change the BMI.
2. The bootstrap loader of the PSOC Control C1 becomes confused if invalid / incorrect data have been sampled. To prevent unexpected behavior, we recommend to perform a power-on-reset of the target before establishing a connection using J-Link.
3. The BMI configuration is stored in the flash and therefore survives a power-on-reset of the device.

Overview BMI Modes

The table below represents the available boot mode index (BMI) configurations and the used pins in this mode.

Boot Mode overview

Value	BMI	Description
0xFFC0	ASC Bootstrap Load Mode (ASC_BSL)	Factory default half-duplex UART
0xF8C1	User Mode (Productive)
0xF8C3	User Mode (Debug) SWD0	P0.14 & P0.15 used for SWD
0xFAC3	User Mode (Debug) SWD1	P1.3 & P1.2 used for SWD
0xF9C3	User Mode (Debug) SPD0	P0.14 used for SPD
0xFBC3	User Mode (Debug) SPD1	P1.3 used for SPD
0xF8C7	User Mode (HAR) SWD0	P0.14 & P0.15 used for SWD
0xFAC7	User Mode (HAR) SWD1	P1.3 & P1.2 used for SWD
0xF9C7	User Mode (HAR) SPD0	P0.14 used for SPD
0xFBC7	User Mode (HAR) SPD1	P1.3 used for SPD

For further information regarding the BMI, please refer to the technical reference manual of the Infineon PSOC Control C1 series.