Gaisler NOEL-V
The Gaisler NOELV are 32/64-bit RISC-V (RV32/RV64) IP cores, designed by Gaisler.
Flash Banks
- Device does not have internal flash.
NOELVARTY device selection
The NOELVARTY32/64 are special devices that can be selected for J-Link. These select the standard Gaisler NOEL-V that are implemented for the sample bitstreams as part of the Gaisler NOEL-ARTYA7. Device specifics include:
- Memory map
As the NOEL-V is a customizable core, the NOELVARTY32/64 selection may not be appropriate for customized cores but for the standard one running on the ARTY-100T FPGA evaluation board only.
Limitations
Reset
Reset support depends on the particular IP core configuration and may not be implemented.
Attach
Attach support also depends on the configuration and may require device specific initialization to function.
RTT support
As the core does not support System Bus Access (SBA), RTT is not supported for this core.
HSS access
As the core does not support System Bus Access (SBA), HSS is not supported for this core.