CVA Chip CVM016x

The CVA Chip CVM016x are Cortex-M4 based MCUs.

Flash Banks

Internal Flash

CVM0164

Flash Bank	Base address	Size	J-Link Support
PFlash	0x00000000	512 KB
DFlash	0x10010000	64 KB

CVM0166

Flash Bank	Base address	Size	J-Link Support
PFlash	0x00000000	1024 KB
DFlash	0x10000000	128 KB

All integrated flashes have ECC which is why reading erased flash areas is to avoid.
For more information refer to the ECC article.

Internal SRAM

Since CVM016x devices have SRAM with ECC, the J-Link software will initialize 0x6400 bytes of SRAM at address 0x20000000 on connect.
For more information refer to the ECC article.

MCU Security

CVM016x devices require the same security handling as CVM014x devices.

Reset

CVM016x devices have an integrated bootloader which executes before target program execution. While bootloader execution, PFlash can not be accessed from 0x0 - 0xFFF. A special reset strategy is implemented to handle this.

Note:
In case there is no target application in program flash, the core will halt in the hardfault state.

Evaluation Boards

• CVA Chip CVM0146-EVB evaluation board: https://wiki.segger.com/CVA_Chip_CVM0166-EVB