CVA CHIP CVM016x

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The CVA CHIP CVM016x are Cortex-M4 based MCUs.

Supported devices

Refer to the supported device list for a full list of all supported CVM016x family devices, their corresponding names and connection diagrams.

Flash Banks

Internal Flash

CVM0164

Flash Bank Base address Size J-Link Support
PFlash 0x00000000 512 KB YES.png
DFlash 0x10010000 64 KB YES.png

CVM0166

Flash Bank Base address Size J-Link Support
PFlash 0x00000000 1024 KB YES.png
DFlash 0x10000000 128 KB YES.png

All integrated flashes have ECC which is why reading erased flash areas is to avoid.
For more information refer to the ECC article.

Watchdog handling

  • The device has a watchdog WDOG.
  • The watchdog is fed during flash programming.

Internal SRAM

Since CVM016x devices have SRAM with ECC, the J-Link software will initialize 0x6400 bytes of SRAM at address 0x20000000 on connect.
For more information refer to the ECC article.

MCU Security

CVM016x devices require the same security handling as CVM014x devices.

Reset

CVM016x devices have an integrated bootloader which executes before target program execution. While bootloader execution, PFlash can not be accessed from 0x0 - 0xFFF. A special reset strategy is implemented to handle this.

Note:
In case there is no target application in program flash, the core will halt in the hardfault state.

Evaluation Boards

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