TI PGA900EVM

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Revision as of 12:55, 23 September 2024 by Arne (talk | contribs) (Created page with "Category:Evalboards __TOC__ This article describes specifics for the TI PGA900EVM evaluation board.<br> 450px == Preparing for J-Link == *Connect the J-Link to J17. *Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: 400px == OTP programming voltage == *J15 must be closed...")
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This article describes specifics for the TI PGA900EVM evaluation board.
TI PGA900EVM.jpg

Preparing for J-Link

  • Connect the J-Link to J17.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

TI PGA900EVM-connect.png

OTP programming voltage

  • J15 must be closed during OTP programming in order to supply 7.6V to VP_OTP
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