S32E: Difference between revisions
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(Created page with "Category:Knowledge Base S32 is a virtual CPU designed, implemented and heavily used by SEGGER. It is used in the Flasher family of in-system programmers, the J-Link & J-Trace debug and trace probes and available for licensing as emApp, along with documentation and development environment / compiler.") |
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[[Category:Knowledge Base]] | [[Category:Knowledge Base]] | ||
S32E is a [[virtual CPU]] designed, implemented and heavily used by [[SEGGER]]. It is used in the Flasher family of in-system programmers, the J-Link & J-Trace debug and trace probes and available for licensing as [[emApp]], along with documentation and development environment / compiler. | |||
== Overview == | |||
S32E is a virtual 32 bit CPU. It can easily be extended to be a 64-bit CPU by adding some dedicated instructions to allow not only 8/16/32 memory accesses, but also 64-bit. | |||
It has 16 general purpose registers, R0 ... R15. R15 is also used as [[SP]]. | |||
Latest revision as of 19:01, 7 September 2025
S32E is a virtual CPU designed, implemented and heavily used by SEGGER. It is used in the Flasher family of in-system programmers, the J-Link & J-Trace debug and trace probes and available for licensing as emApp, along with documentation and development environment / compiler.
Overview
S32E is a virtual 32 bit CPU. It can easily be extended to be a 64-bit CPU by adding some dedicated instructions to allow not only 8/16/32 memory accesses, but also 64-bit. It has 16 general purpose registers, R0 ... R15. R15 is also used as SP.