WCH CH32F2: Difference between revisions
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(Created page with "Category:Device families The '''WCH CH32F2''' are Cortex-M3 based MCUs. __TOC__ == Flash Banks == === Code Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | Code Flash || 0x08000000 || 32KB - 256KB || style="text-align:center;"| {{YES}} |} == Watchdog Handling == * The device has a watchdog that is fed during flash programming. == Erase Value == * The device has a special erase value that is 0x39 on even address...") |
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== Minimum requirements == | == Minimum requirements == | ||
* J-Link software V8. | * J-Link software V8.10i or later | ||
==Evaluation Boards== | ==Evaluation Boards== | ||
* [[WCH CH32F203-EVT]] | * [[WCH CH32F203-EVT]] | ||
Latest revision as of 16:29, 27 November 2024
The WCH CH32F2 are Cortex-M3 based MCUs.
Flash Banks
Code Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Code Flash | 0x08000000 | 32KB - 256KB | 
|
Watchdog Handling
- The device has a watchdog that is fed during flash programming.
Erase Value
- The device has a special erase value that is 0x39 on even address byte reads and 0xe3 on odd address byte reads.
Device Specific Handling
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
Minimum requirements
- J-Link software V8.10i or later