Espressif ESP32-P4 NANO: Difference between revisions
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(Created page with "Category:Evalboards __TOC__ This article describes specifics for the Espressif ESP32-P4_NANO evaluation board.<br> 450px | thumb | right == Preparing for J-Link == *Enable external JTAG interface using the following link ESP32 external JTAG interface *Connect the J-Link to this pins: {| class="seggertable" |- ! J-Link Pin || Connector !! Pin || Name |- | VTref || J1 || 1 || 3V3 |- | GND || J1 || 15 || GND |- | TDI || J1 |...") |
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__TOC__ | __TOC__ | ||
This article describes specifics for the Espressif ESP32- | This article describes specifics for the Espressif ESP32-P4-NANO evaluation board.<br> | ||
[[File:ESP32-P4_NANO_board.jpg | 450px | thumb | right]] | [[File:ESP32-P4_NANO_board.jpg | 450px | thumb | right]] | ||
| Line 13: | Line 13: | ||
! J-Link Pin || Connector !! Pin || Name | ! J-Link Pin || Connector !! Pin || Name | ||
|- | |- | ||
| VTref || | | VTref || Left GPIO connector || 1 || 3V3 | ||
|- | |- | ||
| GND || | | GND || Left GPIO connector || 25 || GND | ||
|- | |- | ||
| TDI || | | TDI || Right GPIO connector || 9 || MTDI | ||
|- | |- | ||
| TMS/SWDIO || | | TMS/SWDIO || Left GPIO connector || 12 || MTMS | ||
|- | |- | ||
| TCK/SWCLK || | | TCK/SWCLK || Right GPIO connector || 11 || MTCK | ||
|- | |- | ||
| TDO/SWO || | | TDO/SWO || Left GPIO connector || 11 || MTDO | ||
|} | |} | ||
*Power the board via USB Type-C to UART Port | *Power the board via USB Type-C to UART Port | ||
| Line 35: | Line 33: | ||
== Example Project== | == Example Project== | ||
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Espressif EESP32- | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Espressif EESP32-P4-NANO.<br>It is a simple Hello World sample linked into the internal SRAM.<br> | ||
====SETUP==== | ====SETUP==== | ||
*Embedded Studio: V8.24 | *Embedded Studio: V8.24 | ||
*Hardware: Espressif ESP32- | *Hardware: Espressif ESP32-P4-NANO | ||
*Link: [[File:Espressif_ESP32-P4_NANO_HP_Core_TestProject_ES_V824.zip]] | *Link: [[File:Espressif_ESP32-P4_NANO_HP_Core_TestProject_ES_V824.zip]] | ||
*Link: [[File:Espressif_ESP32-P4_NANO_LP_Core_TestProject_ES_V824.zip]] | *Link: [[File:Espressif_ESP32-P4_NANO_LP_Core_TestProject_ES_V824.zip]] | ||
Latest revision as of 11:10, 8 September 2025
This article describes specifics for the Espressif ESP32-P4-NANO evaluation board.
Preparing for J-Link
- Enable external JTAG interface using the following link ESP32 external JTAG interface
- Connect the J-Link to this pins:
| J-Link Pin | Connector | Pin | Name |
|---|---|---|---|
| VTref | Left GPIO connector | 1 | 3V3 |
| GND | Left GPIO connector | 25 | GND |
| TDI | Right GPIO connector | 9 | MTDI |
| TMS/SWDIO | Left GPIO connector | 12 | MTMS |
| TCK/SWCLK | Right GPIO connector | 11 | MTCK |
| TDO/SWO | Left GPIO connector | 11 | MTDO |
- Power the board via USB Type-C to UART Port
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
- HP core:
- LP core:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Espressif EESP32-P4-NANO.
It is a simple Hello World sample linked into the internal SRAM.
SETUP
- Embedded Studio: V8.24
- Hardware: Espressif ESP32-P4-NANO
- Link: File:Espressif ESP32-P4 NANO HP Core TestProject ES V824.zip
- Link: File:Espressif ESP32-P4 NANO LP Core TestProject ES V824.zip