Espressif ESP32-P4 NANO
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This article describes specifics for the Espressif ESP32-P4-NANO evaluation board.
Preparing for J-Link
- Enable external JTAG interface using the following link ESP32 external JTAG interface
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | Left GPIO connector | 1 | 3V3 |
GND | Left GPIO connector | 25 | GND |
TDI | Right GPIO connector | 9 | MTDI |
TMS/SWDIO | Left GPIO connector | 12 | MTMS |
TCK/SWCLK | Right GPIO connector | 11 | MTCK |
TDO/SWO | Left GPIO connector | 11 | MTDO |
- Power the board via USB Type-C to UART Port
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
- HP core:
- LP core:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Espressif EESP32-P4-NANO.
It is a simple Hello World sample linked into the internal SRAM.
SETUP
- Embedded Studio: V8.24
- Hardware: Espressif ESP32-P4-NANO
- Link: File:Espressif ESP32-P4 NANO HP Core TestProject ES V824.zip
- Link: File:Espressif ESP32-P4 NANO LP Core TestProject ES V824.zip