Call Instruction

In computer and embedded systems, a call instruction changes the PC to the address of the subroutine to call and preserves the return address, thereby giving the subroutine called a chance to return and resume operation with the instruction following the call.

Overview

All CPUs have a PC, and all CPUs have the ability to jump, meaning to change the PC and continue program execution at a different point, instead of the following instruction. Jumps can be conditional or unconditional, and their encoding can be absolute, relative or indirect (taken from another register). A call is very similar to a jump (in some architectures also called branch), the difference is that the return address is preserved so that the called routine (callee) can return, meaning continue executing the instructions immediately following the call instruction. branches to a subroutine or procedure before ultimately returning to the point from which it was called. This is in contrast to a jump instruction, whereby control does not automatically return to the point from which it was called. A subroutine (the callee) returns by using the instruction corresponding to the call, usually called RET (for RETurn from subroutine).

How it works

There are differences between different CPUs, but the basic idea is always the same: Remember where we came from, so the callee can return and program execution can continue right after the call.

Push PC

The classic is that a call is pretty much the same as a

Push PC
JMP

In other words: The PC (or the PC with a certain offset) is pushed onto the stack. The corresponding return instruction then simply "pops" the PC (and might do the adjustment or increment required)

Return register

Some (especially newer) architectures have a return register, also known as link register ( LR)in the ARM world. A call is simply a jump which also copies the PC into this special register. This way, a return is very simple, just a register copy (PC = LR), and since it does not need memory it can be very fast, so there can be a performance benefit. Some CPUs even have a small hardware stack, so a multi-level Link-register to accelerate returns. The problem with the LR is that it still needs to be copied to the stack for every non-leaf function.