TI PGA900EVM: Difference between revisions
Jump to navigation
Jump to search
(Created page with "Category:Evalboards __TOC__ This article describes specifics for the TI PGA900EVM evaluation board.<br> 450px == Preparing for J-Link == *Connect the J-Link to J17. *Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: 400px == OTP programming voltage == *J15 must be closed...") |
(No difference)
|
Latest revision as of 12:55, 23 September 2024
This article describes specifics for the TI PGA900EVM evaluation board.
Preparing for J-Link
- Connect the J-Link to J17.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
OTP programming voltage
- J15 must be closed during OTP programming in order to supply 7.6V to VP_OTP