Zilog Z32F3840100KITG

This article describes specifics for the Zilog Z32F3840100KITG evaluation board.

Preparing for J-Link

• Connect the J-Link to the JTAG header (POD1) on the board
• Power the board via USB (CN4)
• Verify the Connection with J-Link Commander. The output should look as follows:

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Zilog Z32F3840100KITG.
It is a simple Hello World sample linked into the internal flash.

SETUP

• Embedded Studio: V8.20
• Hardware: Zilog Z32F3840100KITG
• Link: File:ZILOG Z32F38401 TestProject ES V820.zip