Template:JLinkResetStrategiesARMv8AR

J-Link supports different specific reset strategies for {{{1}}} based devices. All of the following reset strategies are available via JTAG and in SWD as target interface. All of them halt the CPU after the reset.

Note:

It is recommended that the correct device is selected in the debugger so the debugger can pass the device name to the J-Link Software which makes it possible for J-Link to detect what is the best reset strategy for the device.

Moreover, we recommend that the debugger uses reset type 0 to allow J-Link to dynamically select what reset is the best for the connected device.

Type 0: normal

This is the one and only reset strategy for {{{1}}}. A reset pin is mandatory. If the correct device is selected in the debugger, this reset strategy may also perform some special actions that might be necessary for the connected device. This, for example, is the case for devices that have a ROM bootloader that needs to run after a reset and before the user application is started (especially if the debug interface is disabled after a reset and needs to be enabled by the ROM bootloader).

If no device-specific reset is implemented, the reset is implemented as follows:

1. The device should halt immediately after the reset (before it can execute any user application instructions), which is ensured by setting EDECR.RCE == 1.
2. The core and peripherals should be reset by toggling the reset pin.
3. The core should be powered if necessary.
4. Debug mode should be enabled if necessary.
5. The reset catch bit (EDECR.RCE == 0) should be cleared.