TI MSPM0C
The TI MSPM0C are Cortex-M0+ based micro controllers.
Flash Banks
MSPM0C1103, MSPM0C1104
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| MAIN | 0x00000000 | 
|
Default | Up to 16 KB |
| NONMAIN[1] | 0x41C00000 |
|
Default | 1 KB |
| FACTORY | 0x41C40000 | 
|
Default | 128 B |
MSPM0C1105, MSPM0C1106
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| MAIN | 0x00000000 |
|
Default | Up to 64 KB |
| NONMAIN[1] | 0x41C00000 |
|
Default | 512 B |
| FACTORY | 0x41C40000 |
|
Default | 128 B |
ECC flash
The flash is ECC protected.
- When programming code with J-Link, the device flash controller is set to automatically program the correct ECC values.
- Manual ECC programming is currently not supported by J-Link.
Erased value and Blank Check
- The erased value of the TI MSPM0x devices is non-deterministic. This means that there is no specific erased value for erased flash.
- The device's flash controller will automatically blank check when erasing.
Therefore, blank check via J-Link Software is disabled.
NONMAIN
The NONMAIN region is supported by J-Link for programming. However, the NONMAIN holds boot configuration data and therefore must be programmed with extreme care:
- MSPM0C has only BCR in size of 24 Bytes. All 24 Bytes must be programmed at a time.
- Changes of the NONMAIN region take effect after the next hard reset / power cycle.
- The device can be locked (non-)permanently by writing NONMAIN.
- Erasing this region will lead to disabling debug access, thus locking the device permanently, unless unlocking features are implemented in a firmware.
To prevent unintentional locking of the device, J-Link has special handling when programming the NONMAIN region:
- Erase will be done implicitly when programming NONMAIN.
Device Specific Handling
Connect
Some device specific debug bits are set which prevents the device to enter sleep mode / allows debugging of applications which make use of low power modes.
Watchdog
The MSPM0G devices have two windowed watchdogs implemented (WWDG).
Apparently, the watchdog counter cannot be read directly.
For this reason flash programming is only supported for devices where the watchdogs are not running in window mode.
Supported watchdog settings:
- Disabled
- Enabled (non-window mode)
Reset
A device specific reset is performed for this device. This is because the peripherals are not reset when executing the Cortex-M default reset. A SYSRST is executed via the device specific SYSCTL register instead.