Silicon Labs UPMU-F850
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This article describes specifics for the Silicon Labs UPMU-F850 evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
| J-Link Pin | Connector | Pin | Name |
|---|---|---|---|
| VTref | J24 (Port 0) | Pin 8 | VDD_PM |
| GND | J23 (DEBUG) | Pin 2 | |
| TMS/SWDIO | J23 (DEBUG) | Pin 4 | |
| TCK/SWCLK | J23 (DEBUG) | Pin 7 | |
| RESET | J23 (DEBUG) | Pin 5 |
- Set SW1 (VDD Select) to +3.3V_VReg
- Set JP2 (Imeasure).
- Set jumper between J7: VDD_PM and VDD_COM
- Power the board via USB (J5)
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
