Silergy SA32Dxxx EVB v1.0

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This article describes specifics for the Silergy SA32Dxxx EVB v1.0 evaluation board.
File:Silergy SA32Dxxx EVB v1.0.jpg

Preparing for J-Link

  • Power the board via K1.
  • Connect the J-Link to the Debug Pins J1.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Connect Silergy SA32Dxxx EVB v1.0.png


Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Silergy SA32Dxxx EVB v1.0.
It is a simple Hello World sample linked into the internal flash. Running on the main core0.

SETUP

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