Signal Integrity
Overshoot / Undershoot
Overview
Digital signals on MCU interfaces can exhibit overshoot or undershoot depending on the electrical characteristics of the system. This can occur on many interfaces such as SPI, QSPI, SWD, JTAG, UART, or other high-speed signals.
Most MCU and peripheral datasheets specify absolute maximum ratings and often allow limited overshoot or undershoot beyond the supply rails for a short time.
Whether these limits are met depends primarily on the target hardware design rather than the software controlling the interface. The only influence the software has is drive strength / slew rate configuration, which is in many cases configurable.
Typical factors influencing signal integrity include:
- PCB layout and trace impedance
- Trace length and routing
- Device input characteristics
- MCU output driver configuration (drive strength / slew rate)
- Reflections and ringing on the board
- Termination or damping resistors
Software such as flash loaders or debugging tools only configure the MCU peripherals and IO pin settings. The resulting signal waveform is determined by the electrical behavior of the target hardware.
Responsibility for electrical compliance
Tools provided by SEGGER configure and use MCU peripherals according to the available documentation and reference hardware.
However, SEGGER cannot guarantee that signal levels on a given target board remain within the electrical limits specified in MCU or peripheral datasheets. This depends on the electrical characteristics of the customer's hardware design.
Ensuring that signal levels comply with the relevant specifications is therefore the responsibility of the target hardware design and system integration.
Adjusting driver strength
Many MCUs provide configurable parameters for IO pins, such as:
- Drive strength
- Slew rate
- Output speed configuration
Adjusting these settings can help reduce overshoot or undershoot on a specific hardware platform. In general, higher drive strength and higher slew rates lead to more overshoot / undershoot, hence low drive strength are more desirable. It is recommended to bring drive strength and slew rates as high as necessary and check the resulting signal quality before using a flash loader in production. If required, such configuration can be modified before running an application or flash loader. For example, settings can be applied using a script file.
Example: QSPI flash interface
High-speed flash interfaces such as QSPI are particularly sensitive to signal integrity effects due to their higher clock frequencies.
For example, QSPI flash datasheets often allow limited overshoot or undershoot beyond the supply rails for a short duration (e.g. VCC ±2 V for up to ~20 ns, depending on the device).
If excessive ringing or overshoot occurs on a particular hardware platform, mitigation options include:
- Adjusting MCU IO drive strength or slew rate
- Reducing interface clock frequency
- Adding series resistors for signal damping
- Reviewing PCB routing and termination
10 MHz high und low mit runden See also: QSPI Flash Programming and Debugging Support
Recommendations
If signal integrity issues are suspected, the following steps are recommended:
- Verify signal levels using an oscilloscope.
- Compare the measured values against the limits specified in the device datasheets.
- Adjust IO drive strength or slew rate if supported by the MCU.
- Consider hardware-level mitigation such as series resistors or layout improvements.