ST STM32MP157F-EV1
This article describes specifics for the ST STM32MP157F-EV1 evaluation board.
Preparing for J-Link
- Connect the J-Link to CN14
- Power the board via CN1
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ST STM32MP157F-EV1.
It is a simple Hello World sample linked into the internal flash.
Note: The QSPI programming in this device is done through AP[2] - Cortex-M4. In order to allow J-Link to communicate with the Cortex-M4 AP the STM32MP1xx needs to be set in "Engineering Boot Mode".
SETUP
- Embedded Studio: V8.26d
- Hardware: ST STM32MP157F-EV1
- Link: File:ST STM32MP157F-EV1 TestProject ES V826d.zip
Tracing on ST STM32MP15x
This section describes how to get started with trace on the ST STM32MP15x MCUs. This section assumes that there is already a basic knowledge about trace in general (what is trace, what different implementations of trace are there, etc.). If this is not the case, we recommend to read Trace chapter in the J-Link User Manual (UM08001).
- The sample projects come with a pre-configured project file for Ozone that runs out-of-the box.
- J-Trace PRO is required for streaming trace sample
- J-Link Plus is required for buffer tracing (TMC/ETB trace) sample
- In order to rebuild the sample project, SEGGER Embedded Studio can be used.
- Some of the examples are shipped with a compiled .JLinkScriptfile (extension .pex), should you need the original source, please get in touch with SEGGER directly via our support system: https://www.segger.com/ticket/.
- To create your own .JLinkScriptfile you can use the following guide as reference: How_to_configure_JLinkScript_files_to_enable_tracing
Minimum requirements
In order to use trace on the ST STM32MP15x MCU devices, the following minimum requirements have to be met:
- J-Link software version V7.98f or later
- Ozone V3.36 or later (if streaming trace and / or the sample project from below shall be used)
- J-Trace PRO for Cortex-M HW version V3.0 or later for streaming trace
- J-Link Plus V12 or later for TMC/ETB trace
To rebuild the project our IDE Embedded Studio can be used. The recommended version to rebuild the projects is V8.16. But the examples are all prebuild and work out-of-the box with Ozone, so rebuilding is not necessary.
Streaming trace
The project below has been tested with the minimum requirements mentioned above and a STM32MP157F-EV1.
- Example project: ST_STM32MP1_A7_TraceExample.zip
Trace buffer (TMC/ETB)
The project below is utilizing the on-chip trace buffer (it is not meant for streaming trace).
- Example Project: ST_STM32MP1_A7_TraceExample.zip
Tested Hardware
Reference trace signal quality
The following pictures show oscilloscope measurements of trace signals output by the "Tested Hardware" using the example project. All measurements have been performed using a Agilent InfiniiVision DSO7034B 350 MHz 2GSa/s oscilloscope and 1156A 1.5 GHz Active Probes. If your trace signals look similar on your trace hardware, chances are good that tracing will work out-of-the-box using the example project. More information about correct trace timing can be found at the following website.
Trace clock signal quality
The trace clock signal quality shows multiple trace clock cycles on the tested hardware as reference.
Rise time
The rise time of a signal shows the time needed for a signal to rise from logical 0 to logical 1. For this the values at 10% and 90% of the expected voltage level get used as markers. The following picture shows such a measurement for the trace clock signal.
Setup time
The setup time shows the relative setup time between a trace data signal and trace clock. The measurement markers are set at 50% of the expected voltage level respectively. The following picture shows such a measurement for the trace data signal 0 relative to the trace clock signal.
