ST STM32L0
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This article describes device specifics of the ST STM32L0 series devices. The STM32L0 devices are Cortex-M0 based low power MCUs.
Flash
The following flash regions are supported by J-Link.
| Device | Range | Total size |
|---|---|---|
| Main flash memory | ||
| STM32L0xxx3 | 0x08000000 - 0x08001FFF | 8 KB |
| STM32L0xxx4 | 0x08000000 - 0x08003FFF | 16 KB |
| STM32L0xxx6 | 0x08000000 - 0x08007FFF | 32 KB |
| STM32L0xxx8 | 0x08000000 - 0x0800FFFF | 64 KB |
| STM32L0xxxB | 0x08000000 - 0x0801FFFF | 128 KB |
| STM32L0xxxZ | 0x08000000 - 0x0802FFFF | 192 KB |
| EEPROM | ||
| All | 0x08080000 - 0x08081FFF | Up to 8 KB |
| Option bytes [1] | ||
| All | 0x1FF80000 - 0x1FF8001F | 32 Bytes |
- ↑ See: Option byte programming
Reset
For the STM32L0 devices, the Cortex-M default reset strategy is used.
Debug specific
Please refer to the generic STM32 article.
Option byte programming
Please refer to the generic STM32 article.
Securing/unsecuring the device
Please refer to the generic STM32 article.