Renesas RZ/N2L
The RZ/N2L is an high-performance multi-function MPU featuring two Cortex-R52 cores.
QSPI Flash Programming Support
Before continuing with this article, please read the generic article about QSPI flash programming support: QSPI_Flash_Programming_Support
Setup
- Hardware: Renesas RZ/N2L-RSK
- Device: R9A07G084M0
- SPI NOR Flash: Macronix MX25R512 (64MB flash)
Port / Pin Configuration
| Alternate function | Port / Pin |
|---|---|
| XSPI0_DS | P14_4 |
| XSPI0_CKP | P14_6 |
| XSPI0_IO0 | P14_7 |
| XSPI0_IO1 | P15_0 |
| XSPI0_IO2 | P15_1 |
| XSPI0_IO3 | P15_2 |
| XSPI0_CS0 | P15_7 |
| XSPI0_RESET0 | P16_1 |
| Alternate function | Port / Pin |
|---|---|
| XSPI1_DS | P17_6 |
| XSPI1_CKP | P17_7 |
| XSPI1_IO0 | P16_7 |
| XSPI1_IO1 | P17_0 |
| XSPI1_IO2 | P17_3 |
| XSPI1_IO3 | P17_4 |
| XSPI1_CS0 | P18_2 |
Parallel CFI NOR Flash Programming Support
The J-Link software supports flash programming of an externally connected parallel CFI NOR flash out-of-the-box. The pins used on the RZ/N2L-RSK are assumed by default. The external memory starts at address 0x70000000.
This may be changed in future versions so that customers have to perform the external BUS interface initilization by themselves
Reset
A device specific reset is performed containing the following steps:
- Make sure that the device halts immediately after reset (before it can execute any instruction of the user application) by setting EDECR.RCE == 1
- Reset the core and peripherals by toggling the reset pin
- Pass through the RZ/N2L Authentication process if necessary
- Power core if necessary
- Enable debug mode if necessary
- Clear the reset catch bit (EDECR.RCE == 0)
Debug Authentication
The RZ/N2L supports different authentication levels. Depending on the authentication level, debug access can be granted if the correct key is passed. How this is possible is described below.
For security products, the MDD pin must be set to the correct state.
Specifying the authentication code using J-Link Command String
This is the recommended method as the specified authentication key will be used for the whole session. This way, the key needs not be specified multiple times (e.g. if a reset is performed). The J-Link Command String needs to be passed to the J-Link DLL before establishing the target connection. The J-Link Command String SetCPUConnectIDCode <AuthKey> has to be used (see example below).
Example authentication key:
- AuthenticationKey0: 0x01234567
- AuthenticationKey1: 0x89ABCDEF
- AuthenticationKey2: 0x00224466
- AuthenticationKey3: 0x88AABBCC
exec SetCPUConnectIDCODE 67452301EFCDAB8966442200CCBBAA88
Specifying the authentication code using the ID Code dialog
If the authentication key has not been specified using the Command String although it is required to enable debug access, the following message box will pop up which allows specifying the authentication key.
Evaluation Boards
- Renesas RZ/N2L-RSK: https://wiki.segger.com/Renesas_RZ/N2L-RSK
Example Application
- Renesas RZ/N2L-RSK: https://wiki.segger.com/Renesas_RZ/N2L-RSK#Example_Project
Tracing
This section will provide an overview of the available trace types on this device.
On-chip trace
This device supports so-called on-chip tracing via trace buffer.
For this device this feature works out-of-the-box. Simply select trace buffer as the trace source in your IDE or debug software and you should see trace data recordings when running and halting your application.
Off-chip trace
This device supports so-called off-chip tracing via [TPIU and/or SWO].
Off-chip tracing on this device does not work out-of-the-box and requires additional init steps which are explained here.
Example projects
The following trace example projects are available: