Renesas RZ/A3UL SMARC EVK

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This article describes specifics for the Renesas RZ/A3UL SMARC evaluation board. The board supports different boot / power modes.

Renesas RZ A3UL SMARC EVK.jpg

Minimum requirements

  • J-Link software V7.70a or later

Preparing for J-Link

  • Make sure that SW1-1 == OFF (default is ON). This is necessary to enable debugging.
  • Connect the J-Link to the SWD header (CN2)
  • Power the board via USB-C (5V / 3A)
  • Press the POWER button for a few seconds until the Carrier PWR On led turns on
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Renesas RZ A3UL SMARC Connect.PNG

Example Project

  • N/A

Tracing on Renesas RZ/A3UL

This section describes how to get started with trace on the Renesas RZ/A3UL MCUs. This section assumes that there is already a basic knowledge about trace in general (what is trace, what different implementations of trace are there, etc.). If this is not the case, we recommend to read Trace chapter in the J-Link User Manual (UM08001).

Note:

Some of the examples are shipped with a compiled .JLinkScriptfile (extension .pex), should you need the original source, please get in touch with SEGGER directly via our support system: https://www.segger.com/ticket/.

To create your own .JLinkScriptfile you can use the following guide as reference: How_to_configure_JLinkScript_files_to_enable_tracing

Minimum requirements

In order to use trace on the Renesas RZ/A3UL MCU devices, the following minimum requirements have to be met:

  • J-Link software version V8.12 or later
  • Ozone V3.38a or later (if streaming trace and / or the sample project from below shall be used)
  • J-Link Plus V12 or later for TMC/ETB trace

To rebuild the project our IDE Embedded Studio can be used. The recommended version to rebuild the projects is V8.22. But the examples are all prebuild and work out-of-the box with Ozone, so rebuilding is not necessary.

The project below has been tested with the minimum requirements mentioned above and a RZ/A3UL SMARC EVK.

Trace buffer (TMC/ETB)

The project below is utilizing the on-chip trace buffer (it is not meant for streaming trace). Open the *.jdebug project contained in the example project in Ozone.

Tested Hardware

RZ/A3UL SMARC EVK

Specifics/Limitations

As this evaluation board does not route out trace pins to a trace header an example project for pin tracing can't be provided. But should you design a custom board with trace pins it could also be traced with J-Trace Pro.


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