Renesas RA2E1

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The Renesas RA2E1 are entry-level single-chip microcontroller based on the 48MHz Arm Cortex-M23 core.

Supported devices

Refer to the supported device list for a full list of all supported RA2E1 family devices, their corresponding names and connection diagrams.

Target interfaces

Interface J-Link support Flasher support
SWD YES.png YES.png
JTAG YES.png YES.png

Flash banks

Flash bank Base address J-Link support Flasher support Loader
Name Bank size
Internal optiong-setting memory 0x01010010 YES.png YES.png Default Up to 36 Bytes
Internal program flash 0x00000000 YES.png YES.png Default Up to 128 KB
Internal data flash 0x40100000 YES.png YES.png Default Up to 4 KB


Watchdog handling

  • The device has two watchdogs: Independent Watchdog Timer (IWDT) and Watchdog Timer (WDT)
  • The watchdog is fed during flash programming.

Device specific handling

Connect

  • Authentication via IDCODE is supported
  • Wake-up CPU from low-power mode is supported
  • Connect under reset is supported

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Attach

Attach is a debugging feature which exclusively applies to J-Link and J-Trace and does not apply to Flasher.

  • Attach is supported / desired

Limitations

Security

  • The device has a debug locking feature based on the 128 bit IDCODE, programmed into option-setting memory.
  • During connection, the user will be asked to specify the IDCODE code to unlock debugging access if it was previously programmed.
  • Use the following IDCODE to send the ALeRASE command, which triggers erasure of the user flash (code and data) area and the configuration area: FFFFFFFFFFFFFFFFFF45534152654C41
  • Important: Make sure the byte order of the ALeRASE command is correct, as above shown above. A common mistake is using the wrong byte order, which will cause the command to fail.

Flash write protection

  • The device implements a program flash write protection feature based on the access window. A pair of addresses can be programmed into option-setting memory to determine a memory range, in which programming/erasing operations are permitted.
  • To disable flash protection using JLink commander:
exec EnableEraseAllFlashBanks
erase 0x01010010 0x01010034
  • To disable flash protection using JFlash application:
1) Select "Opt flash" bank only.
2) Click Target -> Manual Programming -> Erase Sectors
  • If FSPR bit of AWS register is set to 0, program flash write protection is enabled permanently.

Evaluation boards

Example application