Renesas FPB-RA0E3

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This article describes specifics for the Renesas FPB-RA0E3 evaluation board.

Preparing for J-Link

  • Set switch S3 to ON
  • Connect the J-Link to 10-pin Cortex debug connector (J13)
  • Power the board via USB-C connector (J10)
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Renesas FPB-RA0E3.
It is a simple Hello World sample linked to run from internal flash.

SETUP

Please Note: Internal flash on RA0 devices contains an option-byte section. This section is excluded from the example application's link configuration to avoid unexpected debug behavior. See SEGGER_Flash.icf for details.

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