PANCHIP PAN1070UA1A Development Kit
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This article describes specifics for the PANCHIP PAN1070UA1A evaluation board.
Preparing for J-Link
- Connect the J-Link to these pins:
| J-Link Pin | Connector | Pin | Name |
|---|---|---|---|
| VTref | P1 | 1 | VBAT |
| GND | P1 | 3 | GND |
| TMS/SWDIO | P1 | 8 | P01 |
| TCK/SWCLK | P1 | 4 | P00 |
| RESET | P1 | 2 | RESET |
- Power the board via pin 10 on P1 (VBAT) at 3.3V.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the PANCHIP PAN1070UA1A.
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V8.24
- Hardware: PANCHIP PAN1070UA1A
- Link: File:PANCHIP PAN1070UA1A TestProject ES V8.24.zip