Nuvoton M5531
The Nuvoton M5531 series are 32-bit microcontrollers with a maximum clock of 220MHz based on the ARM Cortex-M55.
Supported devices
Refer to the supported device list for a full list of all supported M5531 family devices, their corresponding names, and connection diagrams.
Target interfaces
| Interface | J-Link support | Flasher support |
|---|---|---|
| SWD |  |
|
Flash banks
Internal flash
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| APROM0 | 0x00100000 | |
|
Default | 1024KB |
| APROM1 | 0x00200000 | |
|
Default | 1024KB |
| LDROM | 0x0F100000 | |
|
Default | 8KB |
Watchdog handling
These devices have four watchdogs, WTD0/1 and WWTD0/1. If active, they are fed during flash programming.
Device specific handling
Reset
These devices use the normal Cortex-M reset without any special handling.
Attach
Attach is supported.
APROM0 contents
These devices require a bootable image in APROM0. If no bootable program is in APROM0, cold-resetting these devices can break their reset behaviour.
Memory-mapped reads
Depending on the device's boot configuration in CONFIG0[7], certain flash banks may only be read through the ISP.
XOM and OTP support
J-Flash and J-Link do not support the XOM (execute-only memory) and OTP (one-time programming) features of these devices. To request support, contact SEGGER.