NXP MCX W
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The NXP MCX W are single/dual core ARM Cortex-M33 microprocessors for wireless applications.
Flash Banks
Internal Flash (MCX W7x, dual core)
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal Flash(NS) | 0x00000000 | up to 2 MB | 
|
| Internal Flash(S) | 0x10000000 | up to 2 MB |
|
| NBU Flash | 0x48800000 | 512 KB |
|
Flash programming is only supported on M33 core 0.
Internal Flash (MCX W23x, single core)
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal Flash(NS) | 0x00000000 | up to 1 MB |
|
| Internal Flash(S) | 0x10000000 | up to 1 MB |
|
Watchdog Handling
- The device has 1 watchdog.
- The watchdog is fed during flash programming.
ECC RAM
- J-Link initializes on connect to M33 Core 0 32KB RAM at address 0x30004000.
- No init is done on connect to M33 Core 1.
Note:
This section only applies to MCX W7x devices.
This section only applies to MCX W7x devices.
Device Specific Handling
Reset
- The J-Link performs a device specific reset sequence.
Evaluation Boards
NXP X-FRDM-MCX W7x1 evaluation board