NXP MCX-N9XX-EVK

From SEGGER Knowledge Base
Jump to navigation Jump to search

This article describes specifics for the NXP X-MCX-N9XX-EVK evaluation board.
NXP X-MCX-N9XX-EVK board.jpg

Preparing for J-Link

  • Connect the J-Link to J11, J6 hast to set in order to disable MCU-Link on the PCB and work with J-Link.
  • Power the board via J5,J27,J28 (depending on setting of J26)
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

NXP MCX-N9XX-EVK MCXN947 connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP X-MCX-N9XX-EVK.
It is a simple Hello World sample linked into the internal flash.

SETUP

Tracing on NXP MCXN947

This section describes how to get started with trace on the NXP MCXN947 MCUs. This section assumes that there is already a basic knowledge about trace in general (what is trace, what different implementations of trace are there, etc.). If this is not the case, we recommend to read Trace chapter in the J-Link User Manual (UM08001).

Note:

Some of the examples are shipped with a compiled .JLinkScriptfile (extension .pex), should you need the original source, please get in touch with SEGGER directly via our support system: https://www.segger.com/ticket/.

To create your own .JLinkScriptfile you can use the following guide as reference: How_to_configure_JLinkScript_files_to_enable_tracing

Minimum requirements

In order to use trace on the NXP MCXN947 MCU devices, the following minimum requirements have to be met:

  • J-Link software version V8.10 or later
  • Ozone V3.36 or later (if streaming trace and / or the sample project from below shall be used)
  • J-Trace PRO for Cortex-M HW version V3.0 or later for streaming trace
  • J-Link Plus V12 or later for TMC/ETB trace

To rebuild the project our IDE Embedded Studio can be used. The recommended version to rebuild the projects is V8.16. But the examples are all prebuild and work out-of-the box with Ozone, so rebuilding is not necessary.

The project below has been tested with the minimum requirements mentioned above and a X-MCX-N9XX-EVK.

Streaming trace

Open the *_TracePins.jdebug project contained in the example project in Ozone.

Trace buffer (TMC/ETB)

Open the *_TraceBuffer.jdebug project contained in the example project in Ozone.


Reference trace signal quality

The following pictures show oscilloscope measurements of trace signals output by the "Tested Hardware" using the example project. All measurements have been performed using a Agilent InfiniiVision DSO7034B 350 MHz 2GSa/s oscilloscope and 1156A 1.5 GHz Active Probes. If your trace signals look similar on your trace hardware, chances are good that tracing will work out-of-the-box using the example project. More information about correct trace timing can be found at the following website.

Trace clock signal quality

The trace clock signal quality shows multiple trace clock cycles on the tested hardware as reference.

Trace clock signal quality

Rise time

The rise time of a signal shows the time needed for a signal to rise from logical 0 to logical 1. For this the values at 10% and 90% of the expected voltage level get used as markers. The following picture shows such a measurement for the trace clock signal.

TCLK rise time

Setup time

The setup time shows the relative setup time between a trace data signal and trace clock. The measurement markers are set at 50% of the expected voltage level respectively. The following picture shows such a measurement for the trace data signal 0 relative to the trace clock signal.

TD0 setup time