NXP K32W0x1
The NXP K32W041 and K32W061 device family are ultra-low power, high performance wireless microcontrollers based on the ARM Cortex-M4.
Flash Banks
The K32W041 and K32W061 series devices have an internal flash of 640 KiB size that is divided into 3 different regions. For now, the J-Link supports the application space, only. The K32W041AM has an additional 1024KB internal QSPI flash built in.
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal flash (Application space) | 0x00000000 - 0x0009DDFF | 631 KB | 
|
| Internal flash (Reserved by boot code) | 0x0009DE00 - 0x0009EFFF | 512 B | 
|
| Internal flash (Reserved by flash controller) | 0x0009F000 - 0x0009FFFF | 4096 B |
|
| QSPI flash | 0x10000000 - 0x103FFFFF | Up to 4096 KB |
|
Vector Table Remap
The first 512 bytes of the device (0x0000 - 0x01FF) can be mapped to flash, ROM or RAM. When using the J-Link flashloader, this region is mapped to flash. This is done on purpose as the device does not provide a mirror address for the first 512 bytes of flash thus without remapping, the J-Link could not program the first 512 bytes.
ECC flash
The flash seems to be ECC protected. Read fails for sectors with invalid ECC (e.g. erased sectors). In order to prevent errors when reading empty sectors, the DLL do neither perform a blank check nor a compare of the flash content before programming.
Device Specific Handling
Reset
The device has a ROM code which needs to be run after reset. The J-Link halts the MCU after executing the ROM code but before starting the application.
Evaluation Boards
- NXP K32W041AM evaluation board: https://wiki.segger.com/NXP_K32W041AM
Example Application
- NXP K32W041AM evaluation board: https://wiki.segger.com/NXP_K32W041AM#Example_Project