J-Link PLUS V11
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This page contains the general, mechanical and electrical specifications as well as an overview of supported soft- and hardware features of the SEGGER J-Link PLUS V11.
Note:
The J-Link PLUS V11 has been superseded and as such is considered a legacy device.
This device is not eligible for support by SEGGER.
Refer to the J-Link Model Overview for a list of most recent devices by SEGGER.
We recommend to make use of the SEGGER Trade-In-Program to upgrade to the current version of the product.
When new features are added, articles for legacy models may not be updated.
Hardware Features
| Feature | Supported |
|---|---|
| USB 2.0 Full Speed | 
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| USB 2.0 Hi-Speed |
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| WinUSB |
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| JTAG interface |
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| cJTAG interface |
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| cJTAG interface without/buggy KEEPER logic |
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| SWD interface |
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| SWO interface |
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| SPI interface |
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| QSPI interface | 
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| Microchip ICSP interface |
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| Renesas FINE interface |
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| SiLabs C2 2-wire interface |
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| ETB Trace ARM7/9 |
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| ETB Trace Cortex-M |
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| ETB Trace Cortex-A/R |
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| ETM Trace Cortex-M |
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| VCOM |
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| Memory Stop mode support |
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| Cortex-M Monitor Mode debugging |
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| SWD Multi-Drop |
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| CMSIS-DAP v1 (HID) mode |
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Supported cores
J-Link provides debugging support for the following cores.
Note:
If you are interested in J-Link support for a core that is not listed here, please feel free to request support via the SEGGER support ticket system.
If you are interested in J-Link support for a core that is not listed here, please feel free to request support via the SEGGER support ticket system.
| Core | Supported | Since |
| Arm China cores | ||
|---|---|---|
| STAR-MC1 |
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| STAR-MC2 |
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| Arm Cortex cores | ||
| Cortex-A5 |
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| Cortex-A7 |
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| Cortex-A8 |
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| Cortex-A9 |
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| Cortex-A12 |
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| Cortex-A15 |
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| Cortex-A17 |
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| Cortex-A32 |
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| Cortex-A35 |
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| Cortex-A53 |
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| Cortex-A55 |
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| Cortex-A57 |
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| Cortex-A72 |
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| Cortex-A76 |
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| Cortex-R4 |
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| Cortex-R5 |
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| Cortex-R7 |
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| Cortex-R8 |
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| Cortex-R52 |
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| Cortex-M0 |
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| Cortex-M0+ |
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| Cortex-M1 |
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| Cortex-M3 |
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| Cortex-M4 |
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| Cortex-M7 |
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| Cortex-M23 |
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| Cortex-M33 |
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| Cortex-M52 |
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| Cortex-M55 |
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| Cortex-M85 |
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| Arm (legacy) cores | ||
| ARM720T |
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| ARM7TDMI |
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| ARM7TDMI-S |
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| ARM920T |
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| ARM922T |
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| ARM926EJ-S |
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| ARM946E-S |
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| ARM966E-S |
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| ARM1136JF-S |
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| ARM1136J-S |
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| ARM1156T2-S |
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| ARM1156T2F-S |
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| ARM1176JZ-S |
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| ARM1176JZF |
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| ARM1176JZF-S |
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| Cadence Tensilica cores | ||
| HiFi 1 |
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| HiFi 3 |
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| HiFi 3z |
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| HiFi 4 |
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| HiFi 5 |
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| Fusion F1 |
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| Xtensa LX6 |
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| Xtensa LX7 |
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| Microchip PIC cores | ||
| Microchip PIC32MX |
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| Microchip PIC32MZ |
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| Microchip PIC32WK |
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| Renesas RX cores | ||
| RX110 |
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| RX111 |
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| RX113 |
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| RX130 |
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| RX13T |
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| RX140 |
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| RX14T |
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| RX210 |
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| RX21A |
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| RX220 |
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| RX231 |
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| RX23T |
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| RX24T |
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| RX610 |
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| RX621 |
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| RX62G |
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| RX62N |
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| RX62T |
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| RX630 |
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| RX631 |
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| RX63N |
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| RX63T |
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| RX64M |
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| RX65N |
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| RX651 |
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| RX660 |
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| RX66T |
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| RX71M |
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| RX72M |
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| RX72N |
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| RX72T |
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| AndesTech (RISC-V) cores | ||
| A25 |
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| A25MP |
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| A27 |
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| A27L2 |
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| A45 |
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| A45MP |
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| D25F |
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| D45 |
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| N22 |
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| N25 |
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| N25F |
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| N45 |
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| AX25 |
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| AX25MP |
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| AX27 |
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| AX27L2 |
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| AX45 |
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| AX45MP |
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| NX25F |
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| NX27V |
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| NX45 |
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| Codasip (RISC-V) cores | ||
| L10 |
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| L11 |
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| L30 |
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| L31 |
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| L31F |
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| L30F |
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| L50 |
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| L50F |
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| H50X |
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| H50XF |
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| Nuclei Systems (RISC-V) cores | ||
| N101 |
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| N203 |
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| N203E |
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| N205 |
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| N208 |
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| N305 |
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| N307 |
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| N308 |
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| N605 |
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| N607 |
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| N608 |
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| N900 |
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| N900MP |
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| NX605 |
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| NX607 |
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| NX608 |
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| NX900 |
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| NX900MP |
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| UX605 |
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| UX607 |
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| UX608 |
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| UX900 |
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| UX900MP |
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| SiFive (RISC-V) cores | ||
| E20 |
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| E21 |
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| E24 |
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| E31 |
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| E34 |
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| E61 |
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| E61-MC |
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| E76 |
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| E76-MC |
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| P270 |
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| P550 |
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| S21 |
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| S51 |
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| S54 |
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| S61 |
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| S61-MC |
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| S76 |
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| S76-MC |
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| U54 |
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| U54-MC |
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| U64 |
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| U64-MC |
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| U74 |
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| U74-MC |
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| X280 |
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| X280-MC |
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| RISC-V cores misc. | ||
| CloudBEAR BM-310 |
|
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| NEORV32 |
|
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| Syntacore SCR1 |
|
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| Syntacore SCR3 |
|
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| CloudBEAR BM-610 |
|
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| Silicon Labs 8051 cores | ||
| EFM8 |
|
|
Interface speeds
| Interface | Max. speed |
|---|---|
| VCOM | 115200 Bd [1] |
Note:
[1] The max. baudrate for J-Link depends on the configured Eco mode:
| Eco mode | Max. baudrate |
|---|---|
| Normal | 115200 Bd |
| Eco | 57600 Bd |
| Eco Plus | 28800 Bd |
| Eco Max | 28800 Bd |
Specifications
| Specification | Value |
|---|---|
| General | |
| Supported OS | Microsoft Windows (x86/x64), Linux (x86/x64/Arm), macOS (x86) |
| Electromagnetic compatibility (EMC) | EN 55022, EN 55024 |
| Operating temperature | +5°C ... +60°C |
| Storage temperature | -20°C ... +65 °C |
| Relative humidity (non-condensing) | Max. 90% rH |
| Mechanical | |
| Size (without cables) | 100mm x 53mm x 27mm |
| Weight (without cables) | 70g |
| Available interfaces | |
| USB interface | USB 2.0 (Hi-Speed); USB Type B |
| Target interface | JTAG 20-pin (14-pin and other adapters available) |
| JTAG/SWD Interface, Electrical | |
| Power supply | USB powered Max. 50mA + Target Supply current. |
| Target interface voltage (VIF) | 1.2V ... 5V |
| Target supply voltage | 5V (derived from USB voltage) |
| Target supply current | Max. 300mA |
| Reset Type | Open drain. Can be pulled low or tristated. |
| Reset low level output voltage (VOL) | VOL <= 10% of VIF |
| For the whole target voltage range (1.2V <= VIF <= 5V) | |
| LOW level input voltage (VIL) | VIL <= 40% of VIF |
| HIGH level input voltage (VIH) | VIH >= 60% of VIF |
| For 1.2V <= VIF <= 3.6V | |
| LOW level output voltage (VOL) with a load of 10 kOhm | VOL <= 20% of VIF |
| HIGH level output voltage (VOH) with a load of 10 kOhm | VOH >= 80% of VIF |
| For 3.6 <= VIF <= 5V | |
| LOW level output voltage (VOL) with a load of 10 kOhm | VOL <= 20% of VIF |
| HIGH level output voltage (VOH) with a load of 10 kOhm | VOH >= 80% of VIF |
| JTAG/SWD Interface, Timing | |
| Target interface speed | Max. 15 MHz |
| SWO sampling frequency | Max. 30 MHz |
| Data input rise time (Trdi) | Trdi <= 20ns |
| Data input fall time (Tfdi) | Tfdi <= 20ns |
| Data output rise time (Trdo) | Trdo <= 10ns |
| Data output fall time (Tfdo) | Tfdo <= 10ns |
| Clock rise time (Trc) | Trc <= 3ns |
| Clock fall time (Tfc) | Tfc <= 3ns |