J-Link LITE Cortex-M V9
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This page contains the mechanical and electrical specifications of the SEGGER J-Link LITE Cortex-M V9.
For information on the general specifications as well as an overview of supported software features refer to J-Link LITE.
Note:
The J-Link LITE Cortex-M V9 has been superseded and as such is considered a legacy device.
This device is not eligible for support by SEGGER.
Refer to the J-Link Model Overview for a list of most recent devices by SEGGER.
We recommend to make use of the SEGGER Trade-In-Program to upgrade to the current version of the product.
When new features are added, articles for legacy models may not be updated.
Specifications
| Specification | Value |
|---|---|
| General | |
| Supported OS | Microsoft Windows (x86/x64), Linux (x86/x64/Arm), macOS (x86) |
| Electromagnetic compatibility (EMC) | EN 55022, EN 55024 |
| Operating temperature | +5°C ... +60°C |
| Storage temperature | -20°C ... +65 °C |
| Relative humidity (non-condensing) | Max. 90% rH |
| Mechanical | |
| Size (without cables) | 41mm x 34mm x 8mm |
| Weight (without cables) | 6g |
| Available interfaces | |
| USB interface | USB2.0 (Full-Speed), Mini USB |
| Target interface | 9-pin 0.05 Samtec FTSH connector (J-Link Lite CortexM-9 ) or 19-pin 0.05 Samtec FTSH connector (J-Link Lite CortexM-19) |
| JTAG/SWD Interface, Electrical | |
| Power supply | USB powered Max. 50mA + Target Supply current. |
| Target interface voltage (VIF) | 3.3V |
| Target supply voltage | 4.5V ... 5V (if powered with 5V on USB) |
| Target supply current | Max. 300mA |
| LOW level input voltage (VIL) | VIL <= 40% of VIF |
| HIGH level input voltage (VIH) | VIH >= 60% of VIF |
| JTAG/SWD Interface, Timing | |
| Data input rise time (Trdi) | Trdi <= 20ns |
| Data input fall time (Tfdi) | Tfdi <= 20ns |
| Data output rise time (Trdo) | Trdo <= 10ns |
| Data output fall time (Tfdo) | Tfdo <= 10ns |
| Clock rise time (Trc) | Trc <= 10ns |
| Clock fall time (Tfc) | Tfc <= 10ns |