Infineon PSC3 (P6, M6)
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The Infineon PSC3M6/PSC3P6 are Cortex-M33-based microcontrollers suitable for a wide range of secure applications.
Flash Banks
PSC3M6F, PSC3P6F
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| FLASH_NS [1] | 0x22000000 |  |
|
Default | 256 KB |
| FLASH_S [2] | 0x32000000 | |
|
Default | 256 KB |
| FLASH_DBM1_NS [2] | 0x22800000 | |
|
Default | 128 KB |
| FLASH_DBM1_S [2] | 0x32800000 | |
|
Default | 128 KB |
PSC3M6G, PSC3P6G
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| FLASH_NS [1] | 0x22000000 | |
|
Default | 512 KB |
| FLASH_S [2] | 0x32000000 | |
|
Default | 512 KB |
| FLASH_DBM1_NS [2] | 0x22800000 | |
|
Default | 256 KB |
| FLASH_DBM1_S [2] | 0x32800000 | |
|
Default | 256 KB |
Dual Bank Mode
- The device can be configured to operate in either single-bank or dual-bank mode.
- In dual-bank mode, the flash memory is split into two separate 256 KB banks.
- When the device is configured for dual-bank mode, make sure to enable the corresponding FlashBank
FLASH_DBM1. FLASH_DBM1provides access to the alternate flash bank located at0x22800000.
Flash Layout
| Mode | Start address | Size | Description |
|---|---|---|---|
| Dual-bank mode | 0x22000000 | 256 KB | Main bank |
| 0x22800000 | 256 KB | Alternate bank | |
| Single-bank mode | 0x22000000 | 512 KB | Single bank |
Watchdog Handling
- The device has a watchdog WDT.
- The watchdog reset is disabled when the debugger is connected.
Device Specific Handling
Connect
- If a normal connect attempt fails, J-Link connects using Test Mode Acquisition sequence, see Test Mode Acquisition
Reset
- The device uses custom reset: Hardware pin reset, RESET(15) must be connected to function.
Attach
- Attach is supported
Test Mode Acquisition
If DAP is not accessible, it is possible that the users firmware reconfigured the debug pins to be used as GPIO or disabled the debug port. In this case, J-Link tries to connect to the device in Test mode (TM).
Evaluation Boards
Example Application
Tracing
This section will provide an overview of the available trace types on this device.
Off-chip trace
This device supports so-called off-chip tracing via TPIU.
For this device this feature works out-of-the-box. Simply select trace pins as the trace source in your IDE or debug software and you should see trace data recordings when running and halting your application.