Infineon CYUSB308x

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The Infineon CYUSB308x series are device controllers featuring an ARM Cortex-M0 core and Cortex-M4 core.

Flash Banks

Flash Bank Base address Size J-Link Support
Application Flash 0x10000000 Up to 512 KB YES.png
EE Emulation Flash 0x14000000 32 KB YES.png

Multi-Core Support

Before proceeding with this article, please check out the generic article regarding Multi-Core debugging here.
The Infineon CYUSB308x series feature two cores:

Core J-Link Support
M0 YES.png
M4 YES.png

For regular flash programming (not debugging), the M0 core should be preferred.

Watchdog Handling

The device has three watchdogs WDT, MCWDT0 and MCWDT1 that are fed during flash programming via M0 but are not fed during flash programming via M4.

Device Specific Handling

Reset

The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards